/external/compiler-rt/test/profile/ |
D | instrprof-shared.test | 5 2. libt-no-instr1.so is not instrumented 18 RUN: %clang -o %t.d/libt-no-instr1.so -fPIC -shared %S/Inputs/instrprof-shared-lib.c 23 RUN: %clang_profgen -o %t-instr-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %S/Inputs/instrprof-sha… 25 RUN: %clang -o %t-no-instr1-instr -L%t.d -rpath %t.d -lt-instr %S/Inputs/instrprof-shared-main.c 26 RUN: %clang -o %t-no-instr1-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %S/Inputs/instrprof-shared-… 27 RUN: %clang -o %t-no-instr1-no-instr2 -L%t.d -rpath %t.d -lt-no-instr2 %S/Inputs/instrprof-shared-… 30 RUN: %clang -o %t-no-instr2-no-instr1 -L%t.d -rpath %t.d -lt-no-instr1 %t.d/instrprof-shared-main-… 34 RUN: env LLVM_PROFILE_FILE=%t-instr-no-instr1.profraw %run %t-instr-no-instr1 36 RUN: env LLVM_PROFILE_FILE=%t-no-instr1-instr.profraw %run %t-no-instr1-instr 38 RUN: env LLVM_PROFILE_FILE=%t-no-instr1-no-instr1.profraw %run %t-no-instr1-no-instr1 [all …]
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/external/v8/src/ppc/ |
D | assembler-ppc-inl.h | 454 Instr instr1 = instr_at(pc); in target_address_at() local 457 if (IsLis(instr1) && IsOri(instr2)) { in target_address_at() 462 uint64_t hi = (static_cast<uint32_t>((instr1 & kImm16Mask) << 16) | in target_address_at() 469 return reinterpret_cast<Address>(((instr1 & kImm16Mask) << 16) | in target_address_at() 573 Instr instr1 = instr_at(pc); in PatchConstantPoolAccessInstruction() local 575 instr1 &= ~kImm16Mask; in PatchConstantPoolAccessInstruction() 576 instr1 |= (hi_word & kImm16Mask); in PatchConstantPoolAccessInstruction() 579 instr_at_put(pc, instr1); in PatchConstantPoolAccessInstruction() 634 Instr instr1 = instr_at(pc); in set_target_address_at() local 637 if (IsLis(instr1) && IsOri(instr2)) { in set_target_address_at() [all …]
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D | assembler-ppc.cc | 333 bool Assembler::Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, in Is64BitLoadIntoR12() argument 341 return (((instr1 >> 16) == 0x3d80) && ((instr2 >> 16) == 0x618c) && in Is64BitLoadIntoR12() 347 bool Assembler::Is32BitLoadIntoR12(Instr instr1, Instr instr2) { in Is32BitLoadIntoR12() argument 351 return (((instr1 >> 16) == 0x3d80) && ((instr2 >> 16) == 0x618c)); in Is32BitLoadIntoR12()
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D | assembler-ppc.h | 1255 static bool Is64BitLoadIntoR12(Instr instr1, Instr instr2, Instr instr3, 1258 static bool Is32BitLoadIntoR12(Instr instr1, Instr instr2);
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/external/v8/src/arm64/ |
D | code-stubs-arm64.h | 104 Instruction* instr1 = in GetMode() local 106 Instruction* instr2 = instr1->following(); in GetMode() 108 if (instr1->IsUncondBranchImm()) { in GetMode() 113 DCHECK(instr1->IsPCRelAddressing() && (instr1->Rd() == xzr.code())); in GetMode() 136 Instruction* instr1 = patcher.InstructionAt(0); in Patch() local 139 DCHECK(instr1->IsPCRelAddressing() || instr1->IsUncondBranchImm()); in Patch() 143 static_cast<int32_t>(instr1->ImmPCOffset()); in Patch()
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/external/v8/src/mips/ |
D | assembler-mips-inl.h | 159 Instr instr1 = Assembler::instr_at(pc + 0 * Assembler::kInstrSize); in set_target_internal_reference_encoded_at() local 161 DCHECK(Assembler::IsLui(instr1)); in set_target_internal_reference_encoded_at() 163 instr1 &= ~kImm16Mask; in set_target_internal_reference_encoded_at() 173 instr1 | lui_offset_u); in set_target_internal_reference_encoded_at() 179 instr1 | ((imm >> kLuiShift) & kImm16Mask)); in set_target_internal_reference_encoded_at() 244 Instr instr1 = Assembler::instr_at(pc_ + 0 * Assembler::kInstrSize); in target_internal_reference() local 246 DCHECK(Assembler::IsLui(instr1)); in target_internal_reference() 250 Assembler::CreateTargetAddress(instr1, instr2)); in target_internal_reference() 252 int32_t imm = (instr1 & static_cast<int32_t>(kImm16Mask)) << kLuiShift; in target_internal_reference()
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D | assembler-mips.cc | 801 Instr instr1 = instr_at(pos + 0 * Assembler::kInstrSize); in target_at() local 806 imm = CreateTargetAddress(instr1, instr2); in target_at() 808 imm = (instr1 & static_cast<int32_t>(kImm16Mask)) << kLuiShift; in target_at() 863 Instr instr1 = instr_at(pos + 0 * Assembler::kInstrSize); in target_at_put() local 868 DCHECK(IsLui(instr1) && (IsJicOrJialc(instr2) || IsOri(instr2))); in target_at_put() 869 instr1 &= ~kImm16Mask; in target_at_put() 875 instr_at_put(pos + 0 * Assembler::kInstrSize, instr1 | lui_offset_u); in target_at_put() 879 instr1 | ((imm & kHiMask) >> kLuiShift)); in target_at_put() 2973 Instr instr1 = instr_at(pc + 0 * Assembler::kInstrSize); in RelocateInternalReference() local 2978 imm = CreateTargetAddress(instr1, instr2); in RelocateInternalReference() [all …]
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/external/mesa3d/src/compiler/nir/ |
D | nir_instr_set.c | 254 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2) in nir_instrs_equal() argument 256 if (instr1->type != instr2->type) in nir_instrs_equal() 259 switch (instr1->type) { in nir_instrs_equal() 261 nir_alu_instr *alu1 = nir_instr_as_alu(instr1); in nir_instrs_equal() 293 nir_tex_instr *tex1 = nir_instr_as_tex(instr1); in nir_instrs_equal() 327 nir_load_const_instr *load1 = nir_instr_as_load_const(instr1); in nir_instrs_equal() 340 nir_phi_instr *phi1 = nir_instr_as_phi(instr1); in nir_instrs_equal() 360 nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1); in nir_instrs_equal()
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/external/tensorflow/tensorflow/compiler/xla/service/ |
D | hlo_verifier.cc | 540 Status ShapeVerifier::CheckSameChannel(const HloInstruction* instr1, in CheckSameChannel() argument 542 if (instr1->channel_id() != instr2->channel_id()) { in CheckSameChannel() 546 instr1->ToString().c_str(), instr1->channel_id(), in CheckSameChannel()
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D | hlo_verifier.h | 106 Status CheckSameChannel(const HloInstruction* instr1,
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/external/llvm/docs/ |
D | MergeFunctions.rst | 415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123 421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123 430 Instruction with opcode "*instr1*" from *f* is *greater* than instruction with 431 opcode "*instr1*" from *g*; here we have equal types and opcodes, but "*pf1* is
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/external/v8/src/mips64/ |
D | assembler-mips64.cc | 3457 Instr instr1 = instr_at(pc + 1 * kInstrSize); in target_address_at() local 3462 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) && in target_address_at() 3467 ((uint64_t)(GetImmediate16(instr1)) << 16) | in target_address_at() 3509 Instr instr1 = instr_at(pc + kInstrSize); in set_target_address_at() local 3510 uint32_t rt_code = GetRt(instr1); in set_target_address_at() 3518 CHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI && in set_target_address_at()
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/external/v8/src/s390/ |
D | assembler-s390.cc | 345 bool Assembler::Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2) { in Is64BitLoadIntoIP() argument 347 return (((instr1 >> 32) == 0xC0C8) && ((instr2 >> 32) == 0xC0C9)); in Is64BitLoadIntoIP()
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D | assembler-s390.h | 1318 static bool Is64BitLoadIntoIP(SixByteInstr instr1, SixByteInstr instr2);
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/external/v8/src/compiler/s390/ |
D | code-generator-s390.cc | 488 #define ASSEMBLE_BIN_OP(instr1, instr2, instr3) \ argument 489 AssembleBinOp(i, masm(), instr, &MacroAssembler::instr1, \
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