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Searched refs:isPseudo (Results 1 – 25 of 75) sorted by relevance

123

/external/clang/tools/libclang/
DCXCursor.h173 bool isPseudo() const { return C.data[1] != nullptr; } in isPseudo() function
175 assert(isPseudo()); in getAsMacroDefinition()
179 assert(!isPseudo()); in getAsMacroExpansion()
183 assert(isPseudo()); in getPseudoLoc()
DCXCursor.cpp842 if (isPseudo()) in getName()
848 if (isPseudo()) in getDefinition()
853 if (isPseudo()) in getSourceRange()
/external/llvm/lib/Target/AArch64/
DAArch64A53Fix835769.cpp159 if (!I.isPseudo()) in getLastNonPseudo()
218 if (!CurrInstr->isPseudo()) in runOnBasicBlock()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCShuffler.cpp36 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo()); in init()
60 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo()); in init()
/external/llvm/lib/Target/BPF/
DBPFInstrFormats.td32 let isPseudo = 1;
/external/llvm/lib/Target/AMDGPU/
DR600Instructions.td749 let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 in {
758 } // end let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1
968 let isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1024 let isPseudo = 1;
1287 let isPseudo = 1 in {
1348 } // End isPseudo = 1
1356 let usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1367 } // end usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU"
1487 let isPseudo = 1;
1599 let isPseudo = 1 in {
[all …]
DSIInstrInfo.td698 let isPseudo = 1, isCodeGenOnly = 1 in {
720 let isPseudo = 1;
810 let isPseudo = 1;
894 let isPseudo = 1;
992 let isPseudo = 1;
1692 let isPseudo = 1;
1781 let isPseudo = 1;
1870 let isPseudo = 1;
2075 let isPseudo = 1, isCodeGenOnly = 1 in {
2281 let isPseudo = 1;
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsV60.td27 let isPseudo = 1 in
33 let isPseudo = 1 in
40 let isPseudo = 1 in
46 let isPseudo = 1 in
52 let isPseudo = 1 in
58 let isPseudo = 1 in
DHexagonInstrFormats.td357 let isCodeGenOnly = 1, isPseudo = 1 in
363 let isCodeGenOnly = 1, isPseudo = 1 in
369 let isCodeGenOnly = 1, isPseudo = 1 in
DHexagonInstrInfoV5.td101 isCodeGenOnly = 1, isPseudo = 1 in
108 validSubTargets = HasV5SubT, isCodeGenOnly = 1, isPseudo = 1 in
115 hasSideEffects = 0, validSubTargets = HasV5SubT, isPseudo = 1 in
750 isPseudo = 1, InputType = "imm" in
758 isPseudo = 1, InputType = "imm" in
DHexagonInstrInfoV60.td777 let isPseudo = 1, validSubTargets = HasV60SubT in
853 let isPseudo = 1, validSubTargets = HasV60SubT in
920 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in {
948 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
973 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in {
987 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in {
1002 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
1016 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
1034 let isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
/external/swiftshader/third_party/LLVM/include/llvm/MC/
DMCInstrDesc.h282 bool isPseudo() const { in isPseudo() function
/external/llvm/include/llvm/MC/
DMCInstrDesc.h208 bool isPseudo() const { return Flags & (1 << MCID::Pseudo); } in isPseudo() function
/external/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp200 if (!MI.isPseudo()) in runOnMachineFunction()
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsDelaySlotFiller.cpp149 || I->getDesc().isPseudo() in findDelayInstr()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DExpandPostRAPseudos.cpp210 if (!MI->getDesc().isPseudo()) in runOnMachineFunction()
/external/swiftshader/third_party/LLVM/utils/TableGen/
DCodeGenInstruction.h245 bool isPseudo; variable
DPseudoLoweringEmitter.cpp95 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
DInstrInfoEmitter.cpp271 if (Inst.isPseudo) OS << "|(1<<MCID::Pseudo)"; in emitRecord()
/external/llvm/lib/Target/Lanai/
DLanaiDelaySlotFiller.cpp167 FI == LastFiller || I->isPseudo()) in findDelayInstr()
/external/llvm/utils/TableGen/
DCodeGenInstruction.h254 bool isPseudo : 1; variable
DPseudoLoweringEmitter.cpp142 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTarget.td337 bit isPseudo = 0; // Is this instruction a pseudo-instruction?
354 // FIXME: For now this is distinct from isPseudo, above, as code-gen-only
358 // the printer/emitter, we can remove this attribute and just use isPseudo.
391 bit isPseudo = 1;
589 let isCodeGenOnly = 1, isPseudo = 1, Namespace = "TargetOpcode" in {
/external/llvm/include/llvm/Target/
DTarget.td391 bit isPseudo = 0; // Is this instruction a pseudo-instruction?
411 // FIXME: For now this is distinct from isPseudo, above, as code-gen-only
415 // the printer/emitter, we can remove this attribute and just use isPseudo.
418 // isPseudo: Does not have encoding information and should be expanded,
501 bit isPseudo = 1;
780 let isCodeGenOnly = 1, isPseudo = 1, hasNoSchedulingInfo = 1,
922 bit isPseudo = 1;
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp409 (I->isBranch() && !I->isPseudo() && I->getOperand(1).isReg() && in genInstrWithNewOpc()

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