Searched refs:is_g4x (Results 1 – 22 of 22) sorted by relevance
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_clip_state.c | 122 if (brw->gen == 5 || brw->is_g4x) in brw_upload_clip_unit()
159 if (brw->is_g4x) in brw_upload_clip_unit()
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| D | brw_inst.h | 84 } else if (devinfo->is_g4x) { \
176 FC(mask_control_ex, 28, 28, devinfo->is_g4x || devinfo->gen == 5)
442 FC(sampler_return_format, MD(13), MD(12), devinfo->gen == 4 && !devinfo->is_g4x)
813 FC(mask_control_ex, 23, 23, devinfo->is_g4x || devinfo->gen == 5)
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| D | brw_misc_state.c | 598 else if (brw->is_g4x || brw->gen == 5) in brw_emit_depth_stencil_hiz()
626 if (brw->is_g4x || brw->gen >= 5) in brw_emit_depth_stencil_hiz()
838 const bool is_965 = brw->gen == 4 && !brw->is_g4x; in brw_emit_select_pipeline()
982 const bool is_965 = brw->gen == 4 && !brw->is_g4x; in brw_upload_invariant_state()
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| D | brw_surface_formats.c | 299 if (brw->is_g4x || brw->is_haswell) in brw_init_surface_formats()
545 if (brw->gen == 4 && !brw->is_g4x) { in translate_tex_format()
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| D | brw_vs_state.c | 130 assert(brw->is_g4x); in brw_upload_vs_unit()
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| D | brw_eu_compact.c | 1325 assert(devinfo->gen == 5 || devinfo->is_g4x); in update_gen4_jump_count()
1331 int shift = devinfo->is_g4x ? 1 : 0; in update_gen4_jump_count()
1419 if (devinfo->gen == 4 && !devinfo->is_g4x) in brw_compact_instructions()
1448 if ((offset & sizeof(brw_compact_inst)) != 0 && devinfo->is_g4x){ in brw_compact_instructions()
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| D | brw_curbe.c | 327 if (brw->gen == 4 && !brw->is_g4x && in brw_upload_constant_buffer()
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| D | brw_urb.c | 160 } else if (brw->is_g4x) { in recalculate_urb_fence()
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| D | intel_extensions.c | 150 if (brw->is_g4x || brw->gen >= 5) { in intelInitExtensions()
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| D | brw_context.c | 673 if (brw->gen >= 5 || brw->is_g4x) in brw_initialize_context_constants()
972 brw->is_g4x = devinfo->is_g4x; in brwCreateContext()
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| D | brw_clip_util.c | 434 if (p->devinfo->gen == 5 || p->devinfo->is_g4x) in brw_clip_init_clipmask()
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| D | brw_disasm.c | 1408 if (!devinfo->is_g4x) { in brw_disassemble_inst()
1426 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x; in brw_disassemble_inst()
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| D | brw_eu.c | 686 case 4: return devinfo->is_g4x ? GEN45 : GEN4; in gen_from_devinfo()
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| D | brw_context.h | 781 bool is_g4x; member
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| D | brw_vec4_generator.cpp | 1151 else if (devinfo->gen == 5 || devinfo->is_g4x) in generate_scratch_read()
1298 else if (devinfo->gen == 5 || devinfo->is_g4x) in generate_pull_constant_load()
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| D | brw_fs_generator.cpp | 1809 assert(devinfo->gen == 5 || devinfo->is_g4x || inst->exec_size == 8); in generate_code()
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| D | brw_fs.cpp | 3169 if (devinfo->gen != 4 || devinfo->is_g4x) in insert_gen4_send_dependency_workarounds()
4753 devinfo->gen == 5 || devinfo->is_g4x ? MIN2(16, inst->exec_size) : in get_lowered_simd_width()
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| D | brw_eu_emit.c | 780 } else if (devinfo->gen == 4 && !devinfo->is_g4x) { in brw_set_sampler_message()
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| /external/mesa3d/src/intel/common/ |
| D | gen_device_info.h | 38 bool is_g4x; member
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| D | gen_device_info.c | 46 .is_g4x = true,
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| /external/mesa3d/src/intel/isl/ |
| D | isl.h | 70 #define ISL_DEV_IS_G4X(__dev) ((__dev)->info->is_g4x)
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| D | isl_format.c | 349 return devinfo->gen * 10 + (devinfo->is_g4x || devinfo->is_haswell) * 5; in format_gen()
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