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Searched refs:is_mul (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc4/kernel/
Dvc4_validate_shaders.c181 bool is_mul) in check_tmu_write() argument
184 uint32_t waddr = (is_mul ? in check_tmu_write()
206 if (is_mul || in check_tmu_write()
305 bool is_mul) in validate_uniform_address_write() argument
334 if (is_mul || QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_ADD) { in validate_uniform_address_write()
378 bool is_mul) in check_reg_write() argument
381 uint32_t waddr = (is_mul ? in check_reg_write()
386 bool is_b = is_mul ^ ws; in check_reg_write()
395 ((is_mul && cond_mul == QPU_COND_ALWAYS) || in check_reg_write()
396 (!is_mul && cond_add == QPU_COND_ALWAYS))) { in check_reg_write()
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/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_qpu_disasm.c296 print_alu_dst(uint64_t inst, bool is_mul) in print_alu_dst() argument
298 bool is_a = is_mul == ((inst & QPU_WS) != 0); in print_alu_dst()
299 uint32_t waddr = (is_mul ? in print_alu_dst()
312 if (is_mul && (inst & QPU_PM)) { in print_alu_dst()
320 print_alu_src(uint64_t inst, uint32_t mux, bool is_mul) in print_alu_src() argument
333 if (has_si && is_mul && si >= QPU_SMALL_IMM_MUL_ROT + 1) in print_alu_src()
/external/tensorflow/tensorflow/python/ops/
Dsparse_grad.py183 def _SparseDenseCwiseMulOrDivGrad(op, grad, is_mul): argument
202 if is_mul:
/external/tensorflow/tensorflow/core/grappler/optimizers/
Dconstant_folding.cc1470 const bool is_mul = IsMul(*node); in SimplifyGraph() local
1477 (is_mul || is_matmul || is_add || is_sub || is_any_div) && in SimplifyGraph()
1497 ((is_mul && x_is_one) || (is_add && x_is_zero))) { in SimplifyGraph()
1519 (((is_mul || is_any_div) && y_is_one) || in SimplifyGraph()
1532 (is_mul || is_matmul || optimize_zeros_divided_by_y)) { in SimplifyGraph()
1542 if ((is_mul || is_any_div) && x_is_zero && x_matches_output_shape) { in SimplifyGraph()
1545 } else if (is_mul && y_is_zero && y_matches_output_shape) { in SimplifyGraph()
1608 if (has_fetch_ && (IsAdd(*node) || is_mul) && in SimplifyGraph()