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Searched refs:kXRegSize (Results 1 – 25 of 25) sorted by relevance

/external/v8/src/arm64/
Ddeoptimizer-arm64.cc112 (saved_registers.Count() * kXRegSize) + in Generate()
116 const int kFPRegistersOffset = saved_registers.Count() * kXRegSize; in Generate()
180 __ Drop(1 + (kSavedRegistersAreaSize / kXRegSize)); in Generate()
Dmacro-assembler-arm64.h768 inline void Claim(int64_t count, uint64_t unit_size = kXRegSize);
770 uint64_t unit_size = kXRegSize);
771 inline void Drop(int64_t count, uint64_t unit_size = kXRegSize);
773 uint64_t unit_size = kXRegSize);
778 uint64_t unit_size = kXRegSize);
780 uint64_t unit_size = kXRegSize);
Dsimulator-arm64.cc317 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); in PushAddress()
318 intptr_t new_sp = sp() - 2 * kXRegSize; in PushAddress()
320 reinterpret_cast<uintptr_t*>(new_sp + kXRegSize); in PushAddress()
333 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); in PopAddress()
334 set_sp(current_sp + 2 * kXRegSize); in PopAddress()
895 static_assert((sizeof(T) == kWRegSize) || (sizeof(T) == kXRegSize), in AddWithCarry()
1272 case kXRegSize: in PrintWrite()
1770 DCHECK(access_size == kXRegSize); in LoadStorePairHelper()
1800 DCHECK(access_size == kXRegSize); in LoadStorePairHelper()
1865 LogRead(address, kXRegSize, rt); in VisitLoadLiteral()
Dcode-stubs-arm64.cc987 __ Ldr(temp, MemOperand(temp, -static_cast<int64_t>(kXRegSize))); in Generate()
1660 MemOperand(last_match_offsets, kXRegSize * 2, PostIndex)); in Generate()
3314 __ Poke(x19, (spill_offset + 0) * kXRegSize); in CallApiFunctionAndReturn()
3315 __ Poke(x20, (spill_offset + 1) * kXRegSize); in CallApiFunctionAndReturn()
3316 __ Poke(x21, (spill_offset + 2) * kXRegSize); in CallApiFunctionAndReturn()
3317 __ Poke(x22, (spill_offset + 3) * kXRegSize); in CallApiFunctionAndReturn()
3383 __ Peek(x19, (spill_offset + 0) * kXRegSize); in CallApiFunctionAndReturn()
3384 __ Peek(x20, (spill_offset + 1) * kXRegSize); in CallApiFunctionAndReturn()
3385 __ Peek(x21, (spill_offset + 2) * kXRegSize); in CallApiFunctionAndReturn()
3386 __ Peek(x22, (spill_offset + 3) * kXRegSize); in CallApiFunctionAndReturn()
Dmacro-assembler-arm64.cc1286 MemOperand tos(csp, -2 * static_cast<int>(kXRegSize), PreIndex); in PushCalleeSavedRegisters()
1310 MemOperand tos(csp, 2 * kXRegSize, PostIndex); in PopCalleeSavedRegisters()
2766 Claim(extra_space + 1, kXRegSize); in EnterExitFrame()
2794 Add(scratch, csp, kXRegSize); in EnterExitFrame()
2915 Drop(StackHandlerConstants::kSize - kXRegSize, kByteSizeInBytes); in PopStackHandler()
4490 __ sub(jssp, jssp, 4 * kXRegSize); in EmitFrameSetupForCodeAgePatching()
4491 __ sub(csp, csp, 4 * kXRegSize); in EmitFrameSetupForCodeAgePatching()
4492 __ stp(x1, cp, MemOperand(jssp, 0 * kXRegSize)); in EmitFrameSetupForCodeAgePatching()
4493 __ stp(fp, lr, MemOperand(jssp, 2 * kXRegSize)); in EmitFrameSetupForCodeAgePatching()
Dconstants-arm64.h51 const int kXRegSize = kXRegSizeInBits >> 3; variable
/external/vixl/src/aarch64/
Doperands-aarch64.cc134 list.Combine(Register(30, kXRegSize)); in GetCallerSaved()
307 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize)); in Operand()
499 VIXL_ASSERT(reg.GetSizeInBits() > static_cast<int>(kXRegSize)); in GenericOperand()
Doperands-aarch64.h145 return IsRegister() && ((size_ == kWRegSize) || (size_ == kXRegSize)) && in IsValidRegister()
297 typedef internal::FixedSizeRegister<kXRegSize> XRegister;
659 static CPURegList GetCalleeSaved(unsigned size = kXRegSize);
665 static CPURegList GetCallerSaved(unsigned size = kXRegSize);
Dsimulator-aarch64.cc304 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in AddWithCarry()
341 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ShiftOperand()
348 if (reg_size == kXRegSize) { in ShiftOperand()
461 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); in ComputeMemOperandAddress()
464 offset = ExtendValue(kXRegSize, offset, mem_op.GetExtend(), shift_amount); in ComputeMemOperandAddress()
1084 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in AddSubHelper()
1124 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubShifted()
1141 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubExtended()
1151 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitAddSubWithCarry()
1171 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; in VisitLogicalShifted()
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Dinstructions-aarch64.cc56 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in RepeatBitsAcrossReg()
128 unsigned reg_size = GetSixtyFourBits() ? kXRegSize : kWRegSize; in GetImmLogical()
Dinstructions-aarch64.h63 const unsigned kXRegSize = 64; variable
65 const unsigned kXRegSizeInBytes = kXRegSize / 8;
Dassembler-aarch64.h2706 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(imms)) || in ImmS()
2713 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) || in ImmR()
2721 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ImmSetBits()
2723 VIXL_ASSERT((reg_size == kXRegSize) || IsUint6(imms + 3)); in ImmSetBits()
2729 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in ImmRotate()
2730 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) || in ImmRotate()
2742 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); in BitN()
2743 VIXL_ASSERT((reg_size == kXRegSize) || (bitn == 0)); in BitN()
Ddisasm-aarch64.cc265 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; in VisitLogicalImmediate()
293 VIXL_ASSERT((reg_size == kXRegSize) || in IsMovzMovnImm()
305 if ((reg_size == kXRegSize) && in IsMovzMovnImm()
483 ((instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize) - 1; in VisitBitfield()
4290 unsigned reg_size = kXRegSize; in SubstituteRegisterField()
4305 reg_size = kXRegSize; in SubstituteRegisterField()
4623 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; in SubstituteBitfieldImmediateField()
Dassembler-aarch64.cc4204 VIXL_ASSERT(rn.GetSizeInBits() == kXRegSize); in EmitExtendShift()
4415 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); in IsImmMovz()
4432 VIXL_ASSERT((width == kWRegSize) || (width == kXRegSize)); in IsImmLogical()
4516 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
4517 int clz_c = CountLeadingZeros(c, kXRegSize); in IsImmLogical()
4538 clz_a = CountLeadingZeros(a, kXRegSize); in IsImmLogical()
4571 uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57]; in IsImmLogical()
4586 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize); in IsImmLogical()
Dmacro-assembler-aarch64.h703 Mov(rd, (rd.GetSizeInBits() == kXRegSize) ? ~imm : (~imm & kWRegMask)); in Mvn()
846 void PushXRegList(RegList regs) { PushSizeRegList(regs, kXRegSize); } in PushXRegList()
847 void PopXRegList(RegList regs) { PopSizeRegList(regs, kXRegSize); } in PopXRegList()
909 PeekSizeRegList(regs, offset, kXRegSize); in PeekXRegList()
912 PokeSizeRegList(regs, offset, kXRegSize); in PokeXRegList()
Dmacro-assembler-aarch64.cc1619 VIXL_ASSERT(dst.GetSizeInBits() <= kXRegSize); in Move()
1795 IsUintN(rd.GetSizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2, in AddSubWithCarryMacro()
2422 CPURegList(CPURegister::kRegister, kXRegSize, 1, arg_count); in PrintfNoPreserve()
Dsimulator-aarch64.h963 case kXRegSize:
1092 case kXRegSize:
/external/v8/src/full-codegen/arm64/
Dfull-codegen-arm64.cc117 int receiver_offset = info->scope()->num_parameters() * kXRegSize; in Generate()
444 __ Ldp(fp, lr, MemOperand(current_sp, 2 * kXRegSize, PostIndex)); in EmitReturnSequence()
453 __ dc64(kXRegSize * arg_count); in EmitReturnSequence()
663 int offset = -var->index() * kXRegSize; in StackOperand()
1052 __ Peek(x10, 2 * kXRegSize); in VisitForInStatement()
1058 __ Peek(x2, 3 * kXRegSize); in VisitForInStatement()
1063 __ Peek(x1, 4 * kXRegSize); in VisitForInStatement()
1839 __ Peek(x1, (arg_count + 1) * kXRegSize); in EmitCall()
1874 __ Peek(x1, arg_count * kXRegSize); in VisitCallNew()
2103 __ Peek(x1, (argc + 1) * kXRegSize); in EmitCall()
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/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc288 x[i] = Register(n, kXRegSize); in PopulateRegisterArray()
339 Register xn(i, kXRegSize); in Clobber()
Dtest-api-aarch64.cc266 Register r_x1(1, kXRegSize); in TEST()
Dtest-simulator-aarch64.cc871 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToFixed_Helper()
888 Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10); in TestFPToFixed_Helper()
923 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); in TestFPToInt_Helper()
940 Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10); in TestFPToInt_Helper()
Dtest-assembler-aarch64.cc7689 CPURegList inputs(CPURegister::kRegister, kXRegSize, 10, 18); in TEST()
14237 kXRegSize, in TEST()
14242 kXRegSize, in TEST()
14247 kXRegSize, in TEST()
14252 kXRegSize, in TEST()
14259 kXRegSize, in TEST()
14264 kXRegSize, in TEST()
14269 kXRegSize, in TEST()
14274 kXRegSize, in TEST()
14625 PushPopMixedMethodsHelper(claim, kXRegSize); in TEST()
/external/v8/src/regexp/arm64/
Dregexp-macro-assembler-arm64.h129 static const int kFirstCaptureOnStack = kSuccessCounter - kXRegSize;
Dregexp-macro-assembler-arm64.cc1375 int align_mask = (alignment / kXRegSize) - 1; in CallCheckStackGuardState()
/external/v8/src/builtins/arm64/
Dbuiltins-arm64.cc680 __ Peek(x1, 1 * kXRegSize); in Generate_JSConstructStubHelper()
2181 __ DropBySMI(x10, kXRegSize); in LeaveArgumentsAdaptorFrame()