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Searched refs:ldcl (Results 1 – 18 of 18) sorted by relevance

/external/libunwind_llvm/src/
DUnwindRegistersRestore.S449 ldcl p1, cr0, [r0], #8 @ wldrd wR0, [r0], #8
450 ldcl p1, cr1, [r0], #8 @ wldrd wR1, [r0], #8
451 ldcl p1, cr2, [r0], #8 @ wldrd wR2, [r0], #8
452 ldcl p1, cr3, [r0], #8 @ wldrd wR3, [r0], #8
453 ldcl p1, cr4, [r0], #8 @ wldrd wR4, [r0], #8
454 ldcl p1, cr5, [r0], #8 @ wldrd wR5, [r0], #8
455 ldcl p1, cr6, [r0], #8 @ wldrd wR6, [r0], #8
456 ldcl p1, cr7, [r0], #8 @ wldrd wR7, [r0], #8
457 ldcl p1, cr8, [r0], #8 @ wldrd wR8, [r0], #8
458 ldcl p1, cr9, [r0], #8 @ wldrd wR9, [r0], #8
[all …]
/external/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll24 ; CHECK: ldcl p7, c3, [r{{[0-9]+}}]
25 tail call void @llvm.arm.ldcl(i32 7, i32 3, i8* %i) nounwind
47 declare void @llvm.arm.ldcl(i32, i32, i8*) nounwind
/external/clang/test/CodeGen/
Dbuiltins-arm.c96 void ldcl(const void *i) { in ldcl() function
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs297 0x01,0xa3,0xd6,0xed = ldcl p3, c10, [r6, #4]
298 0x00,0xb2,0xd7,0xed = ldcl p2, c11, [r7]
299 0x38,0xc1,0x58,0xed = ldcl p1, c12, [r8, #-224]
300 0x1e,0xd0,0x79,0xed = ldcl p0, c13, [r9, #-120]!
301 0x04,0xe6,0xfa,0xec = ldcl p6, c14, [r10], #16
302 0x12,0xf7,0x7b,0xec = ldcl p7, c15, [r11], #-72
Dbasic-thumb2-instructions.s.cs237 0xd6,0xed,0x01,0xa3 = ldcl p3, c10, [r6, #4]
238 0xd7,0xed,0x00,0xb2 = ldcl p2, c11, [r7]
239 0x58,0xed,0x38,0xc1 = ldcl p1, c12, [r8, #-224]
240 0x79,0xed,0x1e,0xd0 = ldcl p0, c13, [r9, #-120]!
241 0xfa,0xec,0x04,0xe6 = ldcl p6, c14, [r10], #16
242 0x7b,0xec,0x12,0xf7 = ldcl p7, c15, [r11], #-72
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s667 ldcl p3, c10, [r6, #4]
668 ldcl p2, c11, [r7]
669 ldcl p1, c12, [r8, #-224]
670 ldcl p0, c13, [r9, #-120]!
671 ldcl p6, c14, [r10], #16
672 ldcl p7, c15, [r11], #-72
708 @ CHECK: ldcl p3, c10, [r6, #4] @ encoding: [0x01,0xa3,0xd6,0xed]
709 @ CHECK: ldcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xd7,0xed]
710 @ CHECK: ldcl p1, c12, [r8, #-224] @ encoding: [0x38,0xc1,0x58,0xed]
711 @ CHECK: ldcl p0, c13, [r9, #-120]! @ encoding: [0x1e,0xd0,0x79,0xed]
[all …]
Dbasic-thumb2-instructions.s519 ldcl p3, c10, [r6, #4]
520 ldcl p2, c11, [r7]
521 ldcl p1, c12, [r8, #-224]
522 ldcl p0, c13, [r9, #-120]!
523 ldcl p6, c14, [r10], #16
524 ldcl p7, c15, [r11], #-72
547 @ CHECK: ldcl p3, c10, [r6, #4] @ encoding: [0xd6,0xed,0x01,0xa3]
548 @ CHECK: ldcl p2, c11, [r7] @ encoding: [0xd7,0xed,0x00,0xb2]
549 @ CHECK: ldcl p1, c12, [r8, #-224] @ encoding: [0x58,0xed,0x38,0xc1]
550 @ CHECK: ldcl p0, c13, [r9, #-120]! @ encoding: [0x79,0xed,0x1e,0xd0]
[all …]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1091 ldcl p3, c10, [r6, #4]
1092 ldcl p2, c11, [r7]
1093 ldcl p1, c12, [r8, #-224]
1094 ldcl p0, c13, [r9, #-120]!
1095 ldcl p6, c14, [r10], #16
1096 ldcl p7, c15, [r11], #-72
1132 @ CHECK: ldcl p3, c10, [r6, #4] @ encoding: [0x01,0xa3,0xd6,0xed]
1133 @ CHECK: ldcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xd7,0xed]
1134 @ CHECK: ldcl p1, c12, [r8, #-224] @ encoding: [0x38,0xc1,0x58,0xed]
1135 @ CHECK: ldcl p0, c13, [r9, #-120]! @ encoding: [0x1e,0xd0,0x79,0xed]
[all …]
Dbasic-thumb2-instructions.s759 ldcl p3, c10, [r6, #4]
760 ldcl p2, c11, [r7]
761 ldcl p1, c12, [r8, #-224]
762 ldcl p0, c13, [r9, #-120]!
763 ldcl p6, c14, [r10], #16
764 ldcl p7, c15, [r11], #-72
787 @ CHECK: ldcl p3, c10, [r6, #4] @ encoding: [0xd6,0xed,0x01,0xa3]
788 @ CHECK: ldcl p2, c11, [r7] @ encoding: [0xd7,0xed,0x00,0xb2]
789 @ CHECK: ldcl p1, c12, [r8, #-224] @ encoding: [0x58,0xed,0x38,0xc1]
790 @ CHECK: ldcl p0, c13, [r9, #-120]! @ encoding: [0x79,0xed,0x1e,0xd0]
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Darm-tests.txt57 # CHECK: ldcl p1, c9, [r3, #0]!
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td3525 defm t2LDCL : t2LdStCop<0b1110, 1, 1, "ldcl">;
DARMInstrInfo.td4414 defm LDCL : LdStCop <1, 1, "ldcl">;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td4010 defm t2LDCL : t2LdStCop<0b1110, 1, 1, "ldcl", [(int_arm_ldcl imm:$cop, imm:$CRd, addrmode5:$addr)]…
DARMInstrInfo.td5014 defm LDCL : LdStCop <1, 1, "ldcl", [(int_arm_ldcl imm:$cop, imm:$CRd, addrmode5:$addr)]>;
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen541 arm_ldcl, // llvm.arm.ldcl
6565 "llvm.arm.ldcl",
14450 3, // llvm.arm.ldcl
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen546 arm_ldcl, // llvm.arm.ldcl
6604 "llvm.arm.ldcl",
14544 3, // llvm.arm.ldcl
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen546 arm_ldcl, // llvm.arm.ldcl
6604 "llvm.arm.ldcl",
14544 3, // llvm.arm.ldcl
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen546 arm_ldcl, // llvm.arm.ldcl
6604 "llvm.arm.ldcl",
14544 3, // llvm.arm.ldcl