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Searched refs:ldrexh (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dldrex-strex.ll80 ; ***** Example of ldrexh *****
81 ; ASM: ldrexh r1, [r2]
/external/llvm/test/MC/ARM/
Dthumbv8m.s70 ldrexh r1, [r2] label
Dbasic-arm-instructions.s1194 ldrexh r2, [r5]
1199 @ CHECK: ldrexh r2, [r5] @ encoding: [0x9f,0x2f,0xf5,0xe1]
Dbasic-thumb2-instructions.s1057 ldrexh r9, [r12]
1064 @ CHECK: ldrexh r9, [r12] @ encoding: [0xdc,0xe8,0x5f,0x9f]
/external/llvm/test/CodeGen/ARM/
Dcmpxchg-O0.ll32 ; CHECK: ldrexh [[OLD:r[0-9]+]], [r0]
Dldstrex.ll47 ; CHECK: ldrexh r0, [r0]
Datomic-ops-v8.ll139 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
235 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
331 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
427 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
615 ; CHECK: ldrexh r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
954 ; CHECK: ldrexh r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dnacl-atomic-intrinsics.ll389 ; ARM32: ldrexh
668 ; ARM32: ldrexh
879 ; ARM32: ldrexh
921 ; ARM32: ldrexh r{{[0-9]+}}, {{[[]}}[[PTR]]{{[]]}}
1118 ; ARM32: ldrexh
1288 ; ARM32: ldrexh
1449 ; ARM32: ldrexh
1618 ; ARM32: ldrexh [[V:r[0-9]+]], {{[[]}}[[A:r[0-9]+]]{{[]]}}
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs329 0x9f,0x2f,0xf5,0xe1 = ldrexh r2, [r5]
Dbasic-thumb2-instructions.s.cs334 0xdc,0xe8,0x5f,0x9f = ldrexh r9, [r12]
/external/v8/src/arm/
Dassembler-arm.h1031 void ldrexh(Register dst, Register src, Condition cond = al);
Dassembler-arm.cc2164 void Assembler::ldrexh(Register dst, Register src, Condition cond) { in ldrexh() function in v8::internal::Assembler
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s764 ldrexh r2, [r5]
769 @ CHECK: ldrexh r2, [r5] @ encoding: [0x9f,0x2f,0xf5,0xe1]
Dbasic-thumb2-instructions.s754 ldrexh r9, [r12]
761 @ CHECK: ldrexh r9, [r12] @ encoding: [0xdc,0xe8,0x5f,0x9f]
/external/vixl/src/aarch32/
Dassembler-aarch32.h2443 void ldrexh(Condition cond, Register rt, const MemOperand& operand);
2444 void ldrexh(Register rt, const MemOperand& operand) { in ldrexh() function
2445 ldrexh(al, rt, operand); in ldrexh()
Ddisasm-aarch32.h859 void ldrexh(Condition cond, Register rt, const MemOperand& operand);
Ddisasm-aarch32.cc1774 void Disassembler::ldrexh(Condition cond, in ldrexh() function in vixl::aarch32::Disassembler
10468 ldrexh(CurrentCond(), in DecodeT32()
61009 ldrexh(condition, in DecodeA32()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt610 # CHECK: ldrexh r2, [r5]
Dthumb2.txt633 # CHECK: ldrexh r9, [r12]
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt713 # CHECK: ldrexh r9, [r12]
Dbasic-arm-instructions.txt691 # CHECK: ldrexh r2, [r5]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td2998 "ldrexh", "\t$Rt, $addr", "", []>;
DARMInstrInfo.td4171 NoItinerary, "ldrexh", "\t$Rt, $addr", []>;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td3284 "ldrexh", "\t$Rt, $addr", "",
DARMInstrInfo.td4687 NoItinerary, "ldrexh", "\t$Rt, $addr",

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