/external/llvm/test/CodeGen/ARM/ |
D | intrinsics-coprocessor.ll | 40 ; CHECK: mrrc2 p1, #2, r{{[0-9]+}}, r{{[0-9]+}}, c3 41 %3 = tail call { i32, i32 } @llvm.arm.mrrc2(i32 1, i32 2, i32 3) nounwind 79 declare { i32, i32 } @llvm.arm.mrrc2(i32, i32, i32) nounwind
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-thumbv8.txt | 104 # CHECK-V7: mrrc2 109 # CHECK-V7: mrrc2 114 # CHECK-V7: mrrc2
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D | invalid-armv8.txt | 104 # CHECK-V7: mrrc2 109 # CHECK-V7: mrrc2 114 # CHECK-V7: mrrc2
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D | invalid-armv7.txt | 228 # Undefined encodings for mrrc2
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D | thumb2.txt | 1099 # CHECK: mrrc2 p7, #1, r5, r4, c1
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D | basic-arm-instructions.txt | 828 # CHECK: mrrc2 p7, #1, r5, r4, c1
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/external/clang/test/CodeGen/ |
D | builtins-arm.c | 203 uint64_t mrrc2() { in mrrc2() function
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | thumb2-diagnostics.s | 38 mrrc2 p7, #17, r5, r4, c1
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D | diagnostics.s | 113 mrrc2 p7, #17, r5, r4, c1
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D | basic-arm-instructions.s | 889 mrrc2 p7, #1, r5, r4, c1 892 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
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D | basic-thumb2-instructions.s | 1155 mrrc2 p7, #1, r5, r4, c1 1158 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
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/external/llvm/test/MC/ARM/ |
D | thumb2-diagnostics.s | 41 mrrc2 p7, #17, r5, r4, c1
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D | diagnostics.s | 181 mrrc2 p7, #17, r5, r4, c1
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D | basic-arm-instructions.s | 1399 mrrc2 p7, #1, r5, r4, c1 1402 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
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D | basic-thumb2-instructions.s | 1538 mrrc2 p7, #1, r5, r4, c1 1541 @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 383 0x11,0x57,0x54,0xfc = mrrc2 p7, #1, r5, r4, c1
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D | basic-thumb2-instructions.s.cs | 487 0x54,0xfc,0x11,0x57 = mrrc2 p7, #1, r5, r4, c1
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 727 # CHECK: mrrc2 p7, #1, r5, r4, c1
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D | thumb2.txt | 982 # CHECK: mrrc2 p7, #1, r5, r4, c1
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 3702 def t2MRRC2 : t2MovRRCopro<0b1111, "mrrc2", 1>;
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D | ARMInstrInfo.td | 4549 def MRRC2 : MovRRCopro2<"mrrc2", 1 /* from coprocessor to ARM core register */>;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 4256 def t2MRRC2 : t2MovRRCopro<0b1111, "mrrc2", 1, (outs GPR:$Rt, GPR:$Rt2),
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D | ARMInstrInfo.td | 5176 def MRRC2 : MovRRCopro2<"mrrc2", 1 /* from coprocessor to ARM core register */,
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 551 arm_mrrc2, // llvm.arm.mrrc2 6575 "llvm.arm.mrrc2", 14460 3, // llvm.arm.mrrc2
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 556 arm_mrrc2, // llvm.arm.mrrc2 6614 "llvm.arm.mrrc2", 14554 3, // llvm.arm.mrrc2
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