/external/llvm/test/Transforms/Reassociate/ |
D | repeats.ll | 40 %tmp1 = mul i8 3, 3 41 %tmp2 = mul i8 %tmp1, 3 42 %tmp3 = mul i8 %tmp2, 3 43 %tmp4 = mul i8 %tmp3, 3 51 ; CHECK-NEXT: mul 52 ; CHECK-NEXT: mul 54 %tmp1 = mul i3 %x, %x 55 %tmp2 = mul i3 %tmp1, %x 56 %tmp3 = mul i3 %tmp2, %x 57 %tmp4 = mul i3 %tmp3, %x [all …]
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D | mulfactor.ll | 5 ; CHECK: mul i32 %a, %a 6 ; CHECK-NEXT: mul i32 %a, 2 8 ; CHECK-NEXT: mul 13 %tmp.2 = mul i32 %a, %a 15 %tmp.6 = mul i32 %tmp.5, %b 16 %tmp.10 = mul i32 %b, %b 24 ; CHECK: mul 29 %a = mul i32 %t, 6 30 %b = mul i32 %t, 36 39 ; CHECK: mul [all …]
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D | mightymul.ll | 5 %t0 = mul i32 %x, %x 6 %t1 = mul i32 %t0, %t0 7 %t2 = mul i32 %t1, %t1 8 %t3 = mul i32 %t2, %t2 9 %t4 = mul i32 %t3, %t3 10 %t5 = mul i32 %t4, %t4 11 %t6 = mul i32 %t5, %t5 12 %t7 = mul i32 %t6, %t6 13 %t8 = mul i32 %t7, %t7 14 %t9 = mul i32 %t8, %t8 [all …]
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D | wrap-flags.ll | 4 ; Verify the nsw flags are preserved when converting shl to mul. 7 ; CHECK: %mul = mul i32 %i, -2147483648 8 ; CHECK: add i32 %mul, 1 11 %mul = shl nsw i32 %i, 31 12 %mul2 = add i32 %mul, 1 17 ; CHECK: %mul = mul nuw i32 %i, 4 18 ; CHECK: add i32 %mul, 1 21 %mul = shl nuw i32 %i, 2 22 %mul2 = add i32 %mul, 1 27 ; CHECK: %mul = mul nuw nsw i32 %i, 4 [all …]
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/external/llvm/test/Transforms/InstCombine/ |
D | vector-mul.ll | 8 %mul = mul <4 x i8> %InVec, <i8 0, i8 0, i8 0, i8 0> 9 ret <4 x i8> %mul 17 %mul = mul <4 x i8> %InVec, <i8 1, i8 1, i8 1, i8 1> 18 ret <4 x i8> %mul 26 %mul = mul <4 x i8> %InVec, <i8 2, i8 2, i8 2, i8 2> 27 ret <4 x i8> %mul 36 %mul = mul <4 x i8> %InVec, <i8 4, i8 4, i8 4, i8 4> 37 ret <4 x i8> %mul 46 %mul = mul <4 x i8> %InVec, <i8 8, i8 8, i8 8, i8 8> 47 ret <4 x i8> %mul [all …]
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D | fabs.ll | 10 %mul = fmul float %x, %x 11 %fabsf = tail call float @fabsf(float %mul) 15 ; CHECK-NEXT: %mul = fmul float %x, %x 16 ; CHECK-NEXT: ret float %mul 20 %mul = fmul double %x, %x 21 %fabs = tail call double @fabs(double %mul) 25 ; CHECK-NEXT: %mul = fmul double %x, %x 26 ; CHECK-NEXT: ret double %mul 30 %mul = fmul fp128 %x, %x 31 %fabsl = tail call fp128 @fabsl(fp128 %mul) [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | mul_pow2.ll | 3 ; Convert mul x, pow2 to shift. 4 ; Convert mul x, pow2 +/- 1 to shift + add/sub. 10 %mul = shl nsw i32 %x, 1 11 ret i32 %mul 18 %mul = mul nsw i32 %x, 3 19 ret i32 %mul 26 %mul = shl nsw i32 %x, 2 27 ret i32 %mul 35 %mul = mul nsw i32 %x, 5 36 ret i32 %mul [all …]
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D | aarch64-fix-cortex-a53-835769.ll | 26 %mul = mul nsw i64 %0, %b 27 %add = add nsw i64 %mul, %a 45 %mul = mul nsw i32 %0, %b 46 %add = add nsw i32 %mul, %a 60 %mul = mul nsw i64 %0, %b 61 %sub = sub nsw i64 %a, %mul 76 %mul = mul nsw i32 %0, %b 77 %sub = sub nsw i32 %a, %mul 91 %mul = mul nsw i64 %0, %b 92 ret i64 %mul [all …]
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/external/llvm/test/CodeGen/X86/ |
D | imul.ll | 10 %mul = mul i32 %A, 4 11 ret i32 %mul 20 %mul = mul i64 %A, 4 21 ret i64 %mul 29 %mul = mul i32 %A, 4096 30 ret i32 %mul 39 %mul = mul i64 %A, 4096 40 ret i64 %mul 50 %mul = mul i32 %A, -4096 51 ret i32 %mul [all …]
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D | misched-matrix.ll | 148 %mul = mul nsw i32 %tmp1, %tmp 149 %mul.1 = mul nsw i32 %tmp3, %tmp2 150 %mul.2 = mul nsw i32 %tmp5, %tmp4 151 %mul.3 = mul nsw i32 %tmp7, %tmp6 152 %mul.138 = mul nsw i32 %tmp9, %tmp8 153 %mul.1.1 = mul nsw i32 %tmp11, %tmp10 154 %mul.2.1 = mul nsw i32 %tmp13, %tmp12 155 %mul.3.1 = mul nsw i32 %tmp15, %tmp14 156 %mul.240 = mul nsw i32 %tmp17, %tmp16 157 %mul.1.2 = mul nsw i32 %tmp19, %tmp18 [all …]
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D | pr18846.ll | 49 %mul.i4690 = fmul <8 x float> %7, undef 51 %mul.i4616 = fmul <8 x float> %8, undef 52 %mul.i4598 = fmul <8 x float> undef, undef 53 %add.i4597 = fadd <8 x float> undef, %mul.i4598 54 %mul.i4594 = fmul <8 x float> %6, undef 55 %add.i4593 = fadd <8 x float> undef, %mul.i4594 56 %mul.i4578 = fmul <8 x float> %9, undef 57 %add.i4577 = fadd <8 x float> %add.i4593, %mul.i4578 61 %mul.i4564 = fmul <8 x float> %4, undef 62 %add.i4563 = fadd <8 x float> %10, %mul.i4564 [all …]
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/external/llvm/test/CodeGen/SystemZ/ |
D | int-mul-06.ll | 10 %mul = mul i64 %a, 2 11 ret i64 %mul 19 %mul = mul i64 %a, 3 20 ret i64 %mul 28 %mul = mul i64 %a, 32767 29 ret i64 %mul 37 %mul = mul i64 %a, 32768 38 ret i64 %mul 46 %mul = mul i64 %a, 32769 47 ret i64 %mul [all …]
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D | int-mul-05.ll | 10 %mul = mul i32 %a, 2 11 ret i32 %mul 19 %mul = mul i32 %a, 3 20 ret i32 %mul 28 %mul = mul i32 %a, 32767 29 ret i32 %mul 37 %mul = mul i32 %a, 32768 38 ret i32 %mul 46 %mul = mul i32 %a, 32769 47 ret i32 %mul [all …]
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D | int-mul-02.ll | 12 %mul = mul i32 %a, %b 13 ret i32 %mul 22 %mul = mul i32 %a, %b 23 ret i32 %mul 33 %mul = mul i32 %a, %b 34 ret i32 %mul 44 %mul = mul i32 %a, %b 45 ret i32 %mul 55 %mul = mul i32 %a, %b 56 ret i32 %mul [all …]
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D | int-mul-04.ll | 12 %mul = mul i64 %a, %b 13 ret i64 %mul 22 %mul = mul i64 %a, %b 23 ret i64 %mul 33 %mul = mul i64 %a, %b 34 ret i64 %mul 46 %mul = mul i64 %a, %b 47 ret i64 %mul 57 %mul = mul i64 %a, %b 58 ret i64 %mul [all …]
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/external/valgrind/none/tests/mips32/ |
D | FPUarithmetic.stdout.exp-mips32 | 603 mul.s -0.000000 0.000000 -456.250000 604 mul.s -2088940.625000 456.250000 -4578.500000 605 mul.s 102.093750 3.000000 34.031250 606 mul.s -4578.750000 -1.000000 4578.750000 607 mul.s 242287.500000 1384.500000 175.000000 608 mul.s -775.750000 -7.250000 107.000000 609 mul.s -456249999360.000000 1000000000.000000 -456.250000 610 mul.s 41952.125000 -5786.500000 -7.250000 611 mul.s -6094332.000000 1752.000000 -3478.500000 612 mul.s 5.570312 0.015625 356.500000 [all …]
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/external/boringssl/win-x86/crypto/fipsmodule/ |
D | co-586.asm | 33 ; mul a[0]*b[0] 34 mul edx 45 ; mul a[1]*b[0] 46 mul edx 52 ; mul a[0]*b[1] 53 mul edx 64 ; mul a[2]*b[0] 65 mul edx 71 ; mul a[1]*b[1] 72 mul edx [all …]
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/external/llvm/test/Analysis/CostModel/AMDGPU/ |
D | mul.ll | 4 ; CHECK: estimated cost of 3 for {{.*}} mul i32 7 %mul = mul i32 %vec, %b 8 store i32 %mul, i32 addrspace(1)* %out 13 ; CHECK: estimated cost of 6 for {{.*}} mul <2 x i32> 16 %mul = mul <2 x i32> %vec, %b 17 store <2 x i32> %mul, <2 x i32> addrspace(1)* %out 22 ; CHECK: estimated cost of 9 for {{.*}} mul <3 x i32> 25 %mul = mul <3 x i32> %vec, %b 26 store <3 x i32> %mul, <3 x i32> addrspace(1)* %out 31 ; CHECK: estimated cost of 12 for {{.*}} mul <4 x i32> [all …]
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/external/llvm/test/CodeGen/Lanai/ |
D | multiply.ll | 3 ; Test the in place lowering of mul i32. 7 %mul = mul nsw i32 %a, 6 8 ret i32 %mul 16 %mul = mul nsw i32 %a, 7 17 ret i32 %mul 24 %mul = shl nsw i32 %a, 3 25 ret i32 %mul 31 %mul = mul nsw i32 %a, -6 32 ret i32 %mul 40 %mul = mul nsw i32 %a, -7 [all …]
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/external/llvm/test/Transforms/StraightLineStrengthReduce/ |
D | slsr-mul.ll | 8 %mul0 = mul i32 %b, %s 9 ; CHECK: mul i32 10 ; CHECK-NOT: mul i32 15 %mul1 = mul i32 %b1, %s 20 %mul2 = mul i32 %b2, %s 29 %mul0 = mul i32 %b, %s 30 ; CHECK: mul i32 31 ; CHECK-NOT: mul i32 36 %mul1 = mul i32 %b1, %s 41 %mul2 = mul i32 %b2, %s [all …]
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/external/llvm/test/CodeGen/NVPTX/ |
D | mulwide.ll | 7 ; OPT: mul.wide.s16 8 ; NOOPT: mul.lo.s32 11 %val2 = mul i32 %val0, %val1 18 ; OPT: mul.wide.u16 19 ; NOOPT: mul.lo.s32 22 %val2 = mul i32 %val0, %val1 29 ; OPT: mul.wide.s16 30 ; NOOPT: mul.lo.s32 33 %val2 = mul i32 %val0, %val1 40 ; OPT: mul.wide.u16 [all …]
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/lib/ |
D | gk110.asm | 20 mul $r3 u32 $r1 u32 $r2 21 add $r2 (mul high u32 $r2 u32 $r3) $r2 23 mul $r3 u32 $r1 u32 $r2 24 add $r2 (mul high u32 $r2 u32 $r3) $r2 25 mul $r3 u32 $r1 u32 $r2 26 add $r2 (mul high u32 $r2 u32 $r3) $r2 27 mul $r3 u32 $r1 u32 $r2 28 add $r2 (mul high u32 $r2 u32 $r3) $r2 29 mul $r3 u32 $r1 u32 $r2 31 add $r2 (mul high u32 $r2 u32 $r3) $r2 [all …]
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D | gf100.asm | 19 mul $r3 u32 $r1 u32 $r2 20 add $r2 (mul high u32 $r2 u32 $r3) $r2 21 mul $r3 u32 $r1 u32 $r2 22 add $r2 (mul high u32 $r2 u32 $r3) $r2 23 mul $r3 u32 $r1 u32 $r2 24 add $r2 (mul high u32 $r2 u32 $r3) $r2 25 mul $r3 u32 $r1 u32 $r2 26 add $r2 (mul high u32 $r2 u32 $r3) $r2 27 mul $r3 u32 $r1 u32 $r2 28 add $r2 (mul high u32 $r2 u32 $r3) $r2 [all …]
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | mul.ll | 41 ; 32R1-R5: mul $[[T0:[0-9]+]], $4, $5 45 ; 32R6: mul $[[T0:[0-9]+]], $4, $5 54 ; 64R1-R5: mul $[[T0:[0-9]+]], $4, $5 58 ; 64R6: mul $[[T0:[0-9]+]], $4, $5 62 ; MM32: mul $[[T0:[0-9]+]], $4, $5 66 %r = mul i1 %a, %b 79 ; 32R1: mul $[[T0:[0-9]+]], $4, $5 83 ; 32R2-R5: mul $[[T0:[0-9]+]], $4, $5 86 ; 32R6: mul $[[T0:[0-9]+]], $4, $5 94 ; 64R1: mul $[[T0:[0-9]+]], $4, $5 [all …]
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/external/llvm/test/Instrumentation/MemorySanitizer/ |
D | mul_by_constant.ll | 6 ; Check instrumentation mul when one of the operands is a constant. 10 %y = mul i64 %x, 42949672960000 20 ; CHECK: [[B:%.*]] = mul i64 [[A]], 68719476736 26 %y = mul i64 %x, 0 32 ; CHECK: [[B:%.*]] = mul i64 [[A]], 0{{$}} 38 %y = mul i64 %x, -16 44 ; CHECK: [[B:%.*]] = mul i64 [[A]], 16 50 %y = mul i64 %x, -48 56 ; CHECK: [[B:%.*]] = mul i64 [[A]], 16 62 %y = mul i64 %x, 12345 [all …]
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