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Searched refs:mul_s (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
Dprint-arith-fp.ll34 %mul_s = getelementptr [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
39 call i32 (i8*, ...)* @printf( i8* %mul_s, double %mul_r ) ; <i32>:5 [#uses=0]
Dprint-arith-int.ll39 %mul_s = getelementptr [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
44 call i32 (i8*, ...)* @printf( i8* %mul_s, i32 %mul_r ) ; <i32>:5 [#uses=0]
/external/llvm/test/CodeGen/Generic/
Dprint-arith-fp.ll34 %mul_s = getelementptr [12 x i8], [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
39 call i32 (i8*, ...) @printf( i8* %mul_s, double %mul_r ) ; <i32>:5 [#uses=0]
Dprint-arith-int.ll39 %mul_s = getelementptr [12 x i8], [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
44 call i32 (i8*, ...) @printf( i8* %mul_s, i32 %mul_r ) ; <i32>:5 [#uses=0]
/external/llvm/test/MC/Mips/micromips-dspr2/
Dvalid.s115 mul_s.ph $1, $2, $3 # CHECK: mul_s.ph $1, $2, $3 # encoding: [0x00,0x62,0x0c,0x2d]
/external/llvm/test/MC/Mips/dspr2/
Dvalid.s94mul_s.ph $18, $19, $20 # CHECK: mul_s.ph $18, $19, $20 # encoding: [0x7e,0x74,0…
/external/swiftshader/third_party/subzero/src/
DIceAssemblerMIPS32.h243 void mul_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
DIceInstMIPS32.cpp1060 Asm->mul_s(getDest(), getSrc(0), getSrc(1)); in emitIAS()
DIceAssemblerMIPS32.cpp934 void AssemblerMIPS32::mul_s(const Operand *OpFd, const Operand *OpFs, in mul_s() function in Ice::MIPS32::AssemblerMIPS32
/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/
Dvalid.txt114 0x00 0x62 0x0c 0x2d # CHECK: mul_s.ph $1, $2, $3
/external/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt92 0x7e 0x74 0x93 0x98 # CHECK: mul_s.ph $18, $19, $20
/external/llvm/test/MC/Mips/mips32r2/
Dinvalid-dspr2.s76mul_s.ph $10,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
/external/llvm/test/CodeGen/Mips/
Ddsp-r2.ll356 ; CHECK: mul_s.ph
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td114 class MUL_S_PH_MMR2_ENC : POOL32A_3R_FMT<"mul_s.ph", 0b10000101101>;
DMipsDSPInstrInfo.td1017 class MUL_S_PH_DESC : ADDUH_QB_DESC_BASE<"mul_s.ph", int_mips_mul_s_ph,
/external/v8/src/mips/
Dassembler-mips.h883 void mul_s(FPURegister fd, FPURegister fs, FPURegister ft);
Dmacro-assembler-mips.cc2007 mul_s(scratch, fs, ft); in Madd_s()
2029 mul_s(scratch, fs, ft); in Msub_s()
Dassembler-mips.cc2496 void Assembler::mul_s(FPURegister fd, FPURegister fs, FPURegister ft) { in mul_s() function in v8::internal::Assembler
/external/v8/src/mips64/
Dassembler-mips64.h941 void mul_s(FPURegister fd, FPURegister fs, FPURegister ft);
Dmacro-assembler-mips64.cc2221 mul_s(scratch, fs, ft); in Madd_s()
2243 mul_s(scratch, fs, ft); in Msub_s()
Dassembler-mips64.cc2824 void Assembler::mul_s(FPURegister fd, FPURegister fs, FPURegister ft) { in mul_s() function in v8::internal::Assembler
/external/v8/src/compiler/mips/
Dcode-generator-mips.cc1088 __ mul_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
/external/v8/src/compiler/mips64/
Dcode-generator-mips64.cc1318 __ mul_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local