| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_pm4.c | 37 state->last_pm4 = state->ndw++; in si_pm4_cmd_begin()
42 state->pm4[state->ndw++] = dw; in si_pm4_cmd_add()
48 count = state->ndw - state->last_pm4 - 2; in si_pm4_cmd_end()
53 assert(state->ndw <= SI_PM4_MAX_DW); in si_pm4_cmd_end()
112 state->ndw = 0; in si_pm4_clear_state()
145 radeon_emit_array(cs, state->pm4, state->ndw); in si_pm4_emit()
182 unsigned aligned_ndw = align(state->ndw, 8); in si_pm4_upload_indirect_buffer()
188 assert(state->ndw); in si_pm4_upload_indirect_buffer()
200 for (int i = state->ndw; i < aligned_ndw; i++) in si_pm4_upload_indirect_buffer()
203 for (int i = state->ndw; i < aligned_ndw; i++) in si_pm4_upload_indirect_buffer()
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| D | si_pm4.h | 50 unsigned ndw; member
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| D | si_debug.c | 223 ac_parse_ib(f, sctx->init_config->pm4, sctx->init_config->ndw, in si_dump_last_ib()
229 sctx->init_config_gs_rings->ndw, in si_dump_last_ib()
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| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_core.cpp | 120 bc_dump(*sh, bc->bytecode, bc->ndw).run(); in r600_sb_bytecode_process()
129 sh->src_stats.ndw = bc->ndw; in r600_sb_bytecode_process()
259 bc->ndw = nbc.ndw(); in r600_sb_bytecode_process()
260 bc->bytecode = (uint32_t*) malloc(bc->ndw << 2); in r600_sb_bytecode_process()
275 sh->opt_stats.ndw = bc->ndw; in r600_sb_bytecode_process()
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| D | sb_bc_dump.cpp | 417 s << "===== " << ndw << " dw ===== " << sh.ngpr in init()
442 vpass(s), bc_data(), ndw(), id(), in bc_dump()
447 ndw = bc->ndw(); in bc_dump()
526 assert(dw_id + count <= ndw); in dump_dw()
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| D | sb_bc_decoder.cpp | 35 assert(i+1 <= ndw); in decode_cf()
114 assert(i <= ndw); in decode_cf_alu()
179 assert(i <= ndw); in decode_cf_exp()
233 assert(i <= ndw); in decode_cf_mem()
294 assert(i <= ndw); in decode_alu()
409 assert(i + 4 <= ndw); in decode_fetch()
500 assert(i <= ndw); in decode_fetch_gds()
530 assert(i <= ndw); in decode_fetch_vtx()
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| D | sb_bc.h | 587 unsigned ndw; member
600 shader_stats() : ndw(), ngpr(), nstack(), cf(), alu(), alu_clauses(), in shader_stats()
732 unsigned ndw; variable
737 : ctx(sctx), dw(data), ndw(size) {} in bc_decoder()
890 unsigned ndw() { return bc.size(); } in ndw() function
920 if (pos == ndw()) {
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| D | sb_bc_builder.cpp | 71 bb.seek(bb.ndw()); in build()
72 cf->bc.addr = bb.ndw() >> 1; in build()
74 cf->bc.count = (bb.ndw() >> 1) - cf->bc.addr - 1; in build()
77 bb.seek(bb.ndw()); in build()
78 cf->bc.addr = bb.ndw() >> 1; in build()
80 cf->bc.count = (((bb.ndw() >> 1) - cf->bc.addr) >> 1) - 1; in build()
122 bb.seek(bb.ndw()); in build_alu_group()
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| D | sb_shader.cpp | 637 ndw += s.ndw; in accumulate()
650 sblog << "dw:" << ndw << ", gpr:" << ngpr << ", stk:" << nstack in dump()
672 sblog << "dw:"; print_diff(ndw, s.ndw); in dump_diff()
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| D | sb_pass.h | 91 unsigned ndw; variable
101 bc_dump(shader &s, uint32_t *bc_ptr, unsigned ndw) : in bc_dump() argument
102 vpass(s), bc_data(bc_ptr), ndw(ndw), id(), new_group(), group_index() {} in bc_dump()
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| D | sb_bc_parser.cpp | 51 bc_ndw = bc->ndw; in decode()
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| /external/libdrm/radeon/ |
| D | radeon_cs.c | 10 radeon_cs_create(struct radeon_cs_manager *csm, uint32_t ndw) in radeon_cs_create() argument
12 struct radeon_cs_int *csi = csm->funcs->cs_create(csm, ndw); in radeon_cs_create()
31 radeon_cs_begin(struct radeon_cs *cs, uint32_t ndw, in radeon_cs_begin() argument
35 return csi->csm->funcs->cs_begin(csi, ndw, file, func, line); in radeon_cs_begin()
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| D | radeon_cs_int.h | 16 unsigned ndw; member
37 uint32_t ndw);
44 uint32_t ndw,
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| D | radeon_cs_gem.c | 129 uint32_t ndw) in cs_gem_create() argument
134 if (ndw > (64 * 1024 / 4)) { in cs_gem_create()
142 csg->base.ndw = 64 * 1024 / 4; in cs_gem_create()
280 uint32_t ndw, in cs_gem_begin() argument
293 cs->section_ndw = ndw; in cs_gem_begin()
299 if (cs->cdw + ndw > cs->ndw) { in cs_gem_begin()
303 tmp = (cs->cdw + ndw + 0x3FF) & (~0x3FF); in cs_gem_begin()
309 cs->ndw = tmp; in cs_gem_begin()
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| D | radeon_cs.h | 56 unsigned ndw; member
66 uint32_t ndw);
69 uint32_t ndw,
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_asm.c | 180 bc->ndw += 2; in r600_bytecode_add_cf()
185 bc->ndw += 2; in r600_bytecode_add_cf()
910 bc->cf_last->ndw -= align(prev_nliteral, 2); in merge_inst_groups()
1128 if ((bc->cf_last->ndw>>1) >= 110) in load_ar_r6xx()
1159 if ((bc->cf_last->ndw>>1) >= 110) in load_ar()
1255 bc->cf_last->ndw += 2; in r600_bytecode_add_alu_type()
1256 bc->ndw += 2; in r600_bytecode_add_alu_type()
1291 bc->cf_last->ndw += align(nliteral, 2); in r600_bytecode_add_alu_type()
1295 if ((bc->cf_last->ndw >> 1) >= 120) { in r600_bytecode_add_alu_type()
1380 bc->cf_last->ndw += 4; in r600_bytecode_add_vtx()
[all …]
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| D | r600_asm.h | 168 unsigned ndw; member
232 unsigned ndw; member
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| D | eg_asm.c | 70 S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1); in eg_bytecode_cf_build()
76 S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1); in eg_bytecode_cf_build()
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| D | r700_asm.c | 28 unsigned count = (cf->ndw / 4) - 1; in r700_bytecode_cf_vtx_build()
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| D | evergreen_compute.c | 226 bc->ndw = binary->code_size / 4; in r600_create_shader()
259 shader->bc.ndw * 4); in evergreen_create_compute_state()
262 memcpy(p, shader->bc.bytecode, shader->bc.ndw * 4); in evergreen_create_compute_state()
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| D | r600_shader.c | 140 pipe_buffer_create(ctx->screen, 0, PIPE_USAGE_IMMUTABLE, shader->shader.bc.ndw * 4); in store_shader()
146 for (i = 0; i < shader->shader.bc.ndw; ++i) { in store_shader()
150 memcpy(ptr, shader->shader.bc.bytecode, shader->shader.bc.ndw * sizeof(*ptr)); in store_shader()
1736 if ((ctx->bc->cf_last->ndw>>1) >= 0x60) in do_lds_fetch_values()
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| /external/libdrm/tests/amdgpu/ |
| D | cs_tests.c | 133 static int submit(unsigned ndw, unsigned ip) in submit() argument
142 ib_info.size = ndw; in submit()
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| D | vce_tests.c | 145 static int submit(unsigned ndw, unsigned ip) in submit() argument
154 ib_info.size = ndw; in submit()
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