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/external/valgrind/none/tests/mips32/
DFPUarithmetic.stdout.exp-mips32803 neg.s -0.000000 0.000000
804 neg.s -456.250000 456.250000
805 neg.s -3.000000 3.000000
806 neg.s 1.000000 -1.000000
807 neg.s -1384.500000 1384.500000
808 neg.s 7.250000 -7.250000
809 neg.s -1000000000.000000 1000000000.000000
810 neg.s 5786.500000 -5786.500000
811 neg.s -1752.000000 1752.000000
812 neg.s -0.015625 0.015625
[all …]
/external/boringssl/src/crypto/fipsmodule/bn/
Dadd.c69 int a_neg = a->neg, ret; in BN_add()
75 if (a_neg ^ b->neg) { in BN_add()
88 r->neg = 1; in BN_add()
93 r->neg = 0; in BN_add()
99 r->neg = a_neg; in BN_add()
157 r->neg = 0; in BN_uadd()
176 if (a->neg) { in BN_add_word()
177 a->neg = 0; in BN_add_word()
180 a->neg = !(a->neg); in BN_add_word()
202 int add = 0, neg = 0; in BN_sub() local
[all …]
Dcmp.c102 if (a->neg != b->neg) { in BN_cmp()
103 if (a->neg) { in BN_cmp()
108 if (a->neg == 0) { in BN_cmp()
242 return bn->neg == 0 && BN_abs_is_word(bn, 1); in BN_is_one()
246 return BN_abs_is_word(bn, w) && (w == 0 || bn->neg == 0); in BN_is_word()
255 if (width == 0 || bn->neg) { in BN_is_pow2()
283 mask |= (a->neg ^ b->neg); in BN_equal_consttime()
290 if (a->neg && !b->neg) { in BN_less_than_consttime()
293 if (b->neg && !a->neg) { in BN_less_than_consttime()
296 if (a->neg && b->neg) { in BN_less_than_consttime()
Ddiv.c237 sdiv->neg = 0; in BN_div()
242 snum->neg = 0; in BN_div()
269 wnum.neg = 0; in BN_div()
284 res->neg = (numerator->neg ^ divisor->neg); in BN_div()
299 res->neg = 0; in BN_div()
379 int neg = numerator->neg; in BN_div() local
384 rem->neg = neg; in BN_div()
401 if (!r->neg) { in BN_nnmod()
406 return (d->neg ? BN_sub : BN_add)(r, r, d); in BN_nnmod()
443 if (r->neg) { in BN_mod_sub_quick()
[all …]
Dbn.c158 dest->neg = src->neg; in BN_copy()
168 bn->neg = 0; in BN_clear()
176 out->neg = 0; in DEFINE_METHOD_FUNCTION()
243 bn->top = bn->neg = 0; in BN_zero()
260 bn->neg = 0; in BN_set_word()
278 bn->neg = 0; in BN_set_u64()
296 bn->neg = 0; in bn_set_words()
310 if (bn->neg) { in bn_copy_words()
330 return bn->neg != 0; in BN_is_negative()
335 bn->neg = 1; in BN_set_negative()
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dint-neg-02.ll11 %neg = sub i32 0, %val
12 %abs = select i1 %cmp, i32 %neg, i32 %val
23 %neg = sub i32 0, %val
24 %abs = select i1 %cmp, i32 %neg, i32 %val
35 %neg = sub i32 0, %val
36 %abs = select i1 %cmp, i32 %val, i32 %neg
47 %neg = sub i32 0, %val
48 %abs = select i1 %cmp, i32 %val, i32 %neg
60 %neg = sub i64 0, %ext
61 %abs = select i1 %cmp, i64 %neg, i64 %ext
[all …]
Dint-abs-01.ll11 %neg = sub i32 0, %val
12 %res = select i1 %cmp, i32 %neg, i32 %val
22 %neg = sub i32 0, %val
23 %res = select i1 %cmp, i32 %neg, i32 %val
33 %neg = sub i32 0, %val
34 %res = select i1 %cmp, i32 %val, i32 %neg
44 %neg = sub i32 0, %val
45 %res = select i1 %cmp, i32 %val, i32 %neg
56 %neg = sub i64 0, %ext
57 %res = select i1 %cmp, i64 %neg, i64 %ext
[all …]
Dvec-abs-04.ll11 %neg = sub <2 x i64> zeroinitializer, %val
12 %ret = select <2 x i1> %cmp, <2 x i64> %neg, <2 x i64> %val
22 %neg = sub <2 x i64> zeroinitializer, %val
23 %ret = select <2 x i1> %cmp, <2 x i64> %neg, <2 x i64> %val
33 %neg = sub <2 x i64> zeroinitializer, %val
34 %ret = select <2 x i1> %cmp, <2 x i64> %val, <2 x i64> %neg
44 %neg = sub <2 x i64> zeroinitializer, %val
45 %ret = select <2 x i1> %cmp, <2 x i64> %val, <2 x i64> %neg
57 %neg = sub <2 x i64> zeroinitializer, %val
58 %abs = select <2 x i1> %cmp, <2 x i64> %neg, <2 x i64> %val
[all …]
Dvec-abs-02.ll11 %neg = sub <8 x i16> zeroinitializer, %val
12 %ret = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val
22 %neg = sub <8 x i16> zeroinitializer, %val
23 %ret = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val
33 %neg = sub <8 x i16> zeroinitializer, %val
34 %ret = select <8 x i1> %cmp, <8 x i16> %val, <8 x i16> %neg
44 %neg = sub <8 x i16> zeroinitializer, %val
45 %ret = select <8 x i1> %cmp, <8 x i16> %val, <8 x i16> %neg
57 %neg = sub <8 x i16> zeroinitializer, %val
58 %abs = select <8 x i1> %cmp, <8 x i16> %neg, <8 x i16> %val
[all …]
Dvec-abs-03.ll11 %neg = sub <4 x i32> zeroinitializer, %val
12 %ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
22 %neg = sub <4 x i32> zeroinitializer, %val
23 %ret = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
33 %neg = sub <4 x i32> zeroinitializer, %val
34 %ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg
44 %neg = sub <4 x i32> zeroinitializer, %val
45 %ret = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %neg
57 %neg = sub <4 x i32> zeroinitializer, %val
58 %abs = select <4 x i1> %cmp, <4 x i32> %neg, <4 x i32> %val
[all …]
Dvec-abs-01.ll11 %neg = sub <16 x i8> zeroinitializer, %val
12 %ret = select <16 x i1> %cmp, <16 x i8> %neg, <16 x i8> %val
22 %neg = sub <16 x i8> zeroinitializer, %val
23 %ret = select <16 x i1> %cmp, <16 x i8> %neg, <16 x i8> %val
33 %neg = sub <16 x i8> zeroinitializer, %val
34 %ret = select <16 x i1> %cmp, <16 x i8> %val, <16 x i8> %neg
44 %neg = sub <16 x i8> zeroinitializer, %val
45 %ret = select <16 x i1> %cmp, <16 x i8> %val, <16 x i8> %neg
57 %neg = sub <16 x i8> zeroinitializer, %val
58 %abs = select <16 x i1> %cmp, <16 x i8> %neg, <16 x i8> %val
[all …]
Dint-neg-01.ll10 %neg = sub i32 0, %val
11 ret i32 %neg
20 %neg = sub i64 0, %ext
21 ret i64 %neg
31 %neg = sub i64 0, %ext
32 ret i64 %neg
40 %neg = sub i64 0, %val
41 ret i64 %neg
/external/syslinux/core/lwip/src/netif/ppp/
Dlcp.c536 #define LENCIVOID(neg) ((neg) ? CILEN_VOID : 0) in lcp_cilen() argument
537 #define LENCICHAP(neg) ((neg) ? CILEN_CHAP : 0) in lcp_cilen() argument
538 #define LENCISHORT(neg) ((neg) ? CILEN_SHORT : 0) in lcp_cilen() argument
539 #define LENCILONG(neg) ((neg) ? CILEN_LONG : 0) in lcp_cilen() argument
540 #define LENCILQR(neg) ((neg) ? CILEN_LQR: 0) in lcp_cilen() argument
541 #define LENCICBCP(neg) ((neg) ? CILEN_CBCP: 0) in lcp_cilen() argument
567 #define ADDCIVOID(opt, neg) \ in lcp_addci() argument
568 if (neg) { \ in lcp_addci()
573 #define ADDCISHORT(opt, neg, val) \ in lcp_addci() argument
574 if (neg) { \ in lcp_addci()
[all …]
Dipcp.c309 #define LENCIVJ(neg, old) (neg ? (old? CILEN_COMPRESS : CILEN_VJ) : 0) in ipcp_cilen() argument
310 #define LENCIADDR(neg, old) (neg ? (old? CILEN_ADDRS : CILEN_ADDR) : 0) in ipcp_cilen() argument
311 #define LENCIDNS(neg) (neg ? (CILEN_ADDR) : 0) in ipcp_cilen() argument
353 #define ADDCIVJ(opt, neg, val, old, maxslotindex, cflag) \ in ipcp_addci() argument
354 if (neg) { \ in ipcp_addci()
366 neg = 0; \ in ipcp_addci()
370 #define ADDCIADDR(opt, neg, old, val1, val2) \ in ipcp_addci() argument
371 if (neg) { \ in ipcp_addci()
385 neg = 0; \ in ipcp_addci()
389 #define ADDCIDNS(opt, neg, addr) \ in ipcp_addci() argument
[all …]
/external/ppp/pppd/
Dlcp.c676 #define LENCIVOID(neg) ((neg) ? CILEN_VOID : 0) argument
677 #define LENCICHAP(neg) ((neg) ? CILEN_CHAP : 0) argument
678 #define LENCISHORT(neg) ((neg) ? CILEN_SHORT : 0) argument
679 #define LENCILONG(neg) ((neg) ? CILEN_LONG : 0) argument
680 #define LENCILQR(neg) ((neg) ? CILEN_LQR: 0) argument
681 #define LENCICBCP(neg) ((neg) ? CILEN_CBCP: 0) argument
715 #define ADDCIVOID(opt, neg) \ argument
716 if (neg) { \
720 #define ADDCISHORT(opt, neg, val) \ argument
721 if (neg) { \
[all …]
Dipcp.c731 #define LENCIADDRS(neg) (neg ? CILEN_ADDRS : 0) argument
732 #define LENCIVJ(neg, old) (neg ? (old? CILEN_COMPRESS : CILEN_VJ) : 0) argument
733 #define LENCIADDR(neg) (neg ? CILEN_ADDR : 0) argument
734 #define LENCIDNS(neg) LENCIADDR(neg) argument
735 #define LENCIWINS(neg) LENCIADDR(neg) argument
776 #define ADDCIADDRS(opt, neg, val1, val2) \ argument
777 if (neg) { \
791 #define ADDCIVJ(opt, neg, val, old, maxslotindex, cflag) \ argument
792 if (neg) { \
804 neg = 0; \
[all …]
/external/libjpeg-turbo/simd/
Djchuff-sse2-64.asm97 pxor xmm8, xmm8 ; __m128i neg = _mm_setzero_si128();
98 pxor xmm9, xmm9 ; __m128i neg = _mm_setzero_si128();
99 pxor xmm10, xmm10 ; __m128i neg = _mm_setzero_si128();
100 pxor xmm11, xmm11 ; __m128i neg = _mm_setzero_si128();
137 pcmpgtw xmm8, %34 ; neg = _mm_cmpgt_epi16(neg, x1);
138 pcmpgtw xmm9, %35 ; neg = _mm_cmpgt_epi16(neg, x1);
139 pcmpgtw xmm10, %36 ; neg = _mm_cmpgt_epi16(neg, x1);
140 pcmpgtw xmm11, %37 ; neg = _mm_cmpgt_epi16(neg, x1);
141 paddw %34, xmm8 ; x1 = _mm_add_epi16(x1, neg);
142 paddw %35, xmm9 ; x1 = _mm_add_epi16(x1, neg);
[all …]
Djchuff-sse2.asm84 pxor xmm4, xmm4 ; __m128i neg = _mm_setzero_si128();
85 pxor xmm5, xmm5 ; __m128i neg = _mm_setzero_si128();
86 pxor xmm6, xmm6 ; __m128i neg = _mm_setzero_si128();
87 pxor xmm7, xmm7 ; __m128i neg = _mm_setzero_si128();
124 pcmpgtw xmm4, %34 ; neg = _mm_cmpgt_epi16(neg, x1);
125 pcmpgtw xmm5, %35 ; neg = _mm_cmpgt_epi16(neg, x1);
126 pcmpgtw xmm6, %36 ; neg = _mm_cmpgt_epi16(neg, x1);
127 pcmpgtw xmm7, %37 ; neg = _mm_cmpgt_epi16(neg, x1);
128 paddw %34, xmm4 ; x1 = _mm_add_epi16(x1, neg);
129 paddw %35, xmm5 ; x1 = _mm_add_epi16(x1, neg);
[all …]
/external/ltp/testcases/kernel/syscalls/setresgid/
Dsetresgid01.c96 static uid_t nobody_gid, root_gid, neg = -1; variable
104 {&neg, &neg, &neg, &root, &root, &root,
106 {&neg, &neg, &nobody.pw_gid, &root, &root, &nobody,
108 {&neg, &nobody.pw_gid, &neg, &root, &nobody, &nobody,
110 {&nobody.pw_gid, &neg, &neg, &nobody, &nobody, &nobody,
Dsetresgid02.c101 static uid_t nobody_gid, root_gid, bin_gid, neg = -1; variable
109 {&neg, &neg, &neg, &root, &nobody, &nobody,
111 {&neg, &neg, &bin.pw_gid, &root, &nobody, &bin,
113 {&neg, &bin.pw_gid, &neg, &root, &bin, &bin,
115 {&bin.pw_gid, &neg, &neg, &bin, &bin, &bin,
/external/llvm/test/CodeGen/AArch64/
Darm64-neg.ll5 ; CHECK: neg w0, w0
12 ; CHECK: neg x0, x0
19 ; CHECK: neg v0.8b, v0.8b
26 ; CHECK: neg v0.4h, v0.4h
33 ; CHECK: neg v0.2s, v0.2s
40 ; CHECK: neg v0.16b, v0.16b
47 ; CHECK: neg v0.8h, v0.8h
54 ; CHECK: neg v0.4s, v0.4s
61 ; CHECK: neg v0.2d, v0.2d
68 ; CHECK: neg d0, d0
Deon.ll10 %neg = xor i64 %a, -1
11 %xor = xor i64 %shl, %neg
15 ; Same check with mutliple uses of %neg
24 %neg = xor i64 %shl, -1
25 %xor = xor i64 %neg, %a
26 %xor1 = xor i64 %c, %neg
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
D2002-12-05-MissedConstProp.ll4 %A.neg = sub i32 0, %A ; <i32> [#uses=1]
5 %.neg = sub i32 0, 1 ; <i32> [#uses=1]
6 %X = add i32 %.neg, 1 ; <i32> [#uses=1]
7 %Y.neg.ra = add i32 %A, %X ; <i32> [#uses=1]
8 %r = add i32 %A.neg, %Y.neg.ra ; <i32> [#uses=1]
/external/boringssl/src/crypto/asn1/
Da_int.c75 int neg, ret; in ASN1_INTEGER_cmp() local
77 neg = x->type & V_ASN1_NEG; in ASN1_INTEGER_cmp()
78 if (neg != (y->type & V_ASN1_NEG)) { in ASN1_INTEGER_cmp()
79 if (neg) in ASN1_INTEGER_cmp()
87 if (neg) in ASN1_INTEGER_cmp()
120 int pad = 0, ret, i, neg; in i2c_ASN1_INTEGER() local
125 neg = a->type & V_ASN1_NEG; in i2c_ASN1_INTEGER()
132 neg = 0; in i2c_ASN1_INTEGER()
133 if (!neg && (i > 127)) { in i2c_ASN1_INTEGER()
136 } else if (neg) { in i2c_ASN1_INTEGER()
[all …]
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_expr.cpp52 void convert_to_mov(alu_node &n, value *src, bool neg, bool abs) { in convert_to_mov() argument
56 n.bc.src[0].neg = neg; in convert_to_mov()
221 if (n.bc.src[0].abs && !n.bc.src[0].neg) { in fold_setcc()
229 } else if (n.bc.src[0].abs && n.bc.src[0].neg) { in fold_setcc()
244 if (n.bc.src[1].abs && !n.bc.src[1].neg) { in fold_setcc()
252 } else if (n.bc.src[1].abs && n.bc.src[1].neg) { in fold_setcc()
267 if (s0.abs == s1.abs && s0.neg == s1.neg && cmp_type != AF_FLOAT_CMP) { in fold_setcc()
328 if (s.neg) in apply_alu_src_mod()
374 if (s0.abs != s1.abs || s0.neg != s1.neg) in ops_equal()
392 if (n.bc.op == ALU_OP1_MOV && n.bc.src[0].neg && !n.bc.src[1].abs in fold_alu_op1()
[all …]

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