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Searched refs:outs (Results 1 – 25 of 419) sorted by relevance

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/external/swiftshader/third_party/LLVM/tools/macho-dump/
Dmacho-dump.cpp57 outs() << " ('segment_name', '"; in DumpSegmentCommandData()
58 outs().write_escaped(Name, /*UseHexEscapes=*/true) << "')\n"; in DumpSegmentCommandData()
59 outs() << " ('vm_addr', " << VMAddr << ")\n"; in DumpSegmentCommandData()
60 outs() << " ('vm_size', " << VMSize << ")\n"; in DumpSegmentCommandData()
61 outs() << " ('file_offset', " << FileOffset << ")\n"; in DumpSegmentCommandData()
62 outs() << " ('file_size', " << FileSize << ")\n"; in DumpSegmentCommandData()
63 outs() << " ('maxprot', " << MaxProt << ")\n"; in DumpSegmentCommandData()
64 outs() << " ('initprot', " << InitProt << ")\n"; in DumpSegmentCommandData()
65 outs() << " ('num_sections', " << NumSections << ")\n"; in DumpSegmentCommandData()
66 outs() << " ('flags', " << Flags << ")\n"; in DumpSegmentCommandData()
[all …]
/external/llvm/tools/llvm-objdump/
DMachODump.cpp241 dumpBytes(makeArrayRef(bytes, 4), outs()); in DumpDataInCode()
243 outs() << "\t.long " << Value; in DumpDataInCode()
247 dumpBytes(makeArrayRef(bytes, 2), outs()); in DumpDataInCode()
249 outs() << "\t.short " << Value; in DumpDataInCode()
253 dumpBytes(makeArrayRef(bytes, 2), outs()); in DumpDataInCode()
255 outs() << "\t.byte " << Value; in DumpDataInCode()
259 outs() << "\t@ KIND_DATA\n"; in DumpDataInCode()
261 outs() << "\t@ data in code kind = " << Kind << "\n"; in DumpDataInCode()
265 dumpBytes(makeArrayRef(bytes, 1), outs()); in DumpDataInCode()
267 outs() << "\t.byte " << format("%3u", Value) << "\t@ KIND_JUMP_TABLE8\n"; in DumpDataInCode()
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DCOFFDump.cpp97 outs() << format(" 0x%02x: ", unsigned(UCs[0].u.CodeOffset)) in printUnwindCode()
101 outs() << " " << getUnwindRegisterName(UCs[0].getOpInfo()); in printUnwindCode()
105 outs() << " " << UCs[1].FrameOffset; in printUnwindCode()
107 outs() << " " << UCs[1].FrameOffset in printUnwindCode()
112 outs() << " " << ((UCs[0].getOpInfo() + 1) * 8); in printUnwindCode()
115 outs() << " "; in printUnwindCode()
118 outs() << " " << getUnwindRegisterName(UCs[0].getOpInfo()) in printUnwindCode()
122 outs() << " " << getUnwindRegisterName(UCs[0].getOpInfo()) in printUnwindCode()
127 outs() << " XMM" << static_cast<uint32_t>(UCs[0].getOpInfo()) in printUnwindCode()
131 outs() << " XMM" << UCs[0].getOpInfo() in printUnwindCode()
[all …]
/external/curl/src/
Dtool_cb_wrt.c35 bool tool_create_output_file(struct OutStruct *outs) in tool_create_output_file() argument
37 struct GlobalConfig *global = outs->config->global; in tool_create_output_file()
40 if(!outs->filename || !*outs->filename) { in tool_create_output_file()
45 if(outs->is_cd_filename) { in tool_create_output_file()
47 file = fopen(outs->filename, "rb"); in tool_create_output_file()
50 warnf(global, "Refusing to overwrite %s: %s\n", outs->filename, in tool_create_output_file()
57 file = fopen(outs->filename, "wb"); in tool_create_output_file()
59 warnf(global, "Failed to create the file %s: %s\n", outs->filename, in tool_create_output_file()
63 outs->s_isreg = TRUE; in tool_create_output_file()
64 outs->fopened = TRUE; in tool_create_output_file()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrSystem.td17 def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)]>, TB;
20 def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", []>, TB;
25 def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
26 def UD2B : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
29 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", []>;
30 def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", []>, TB;
34 def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
35 def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3",
43 def INT : Ii8<0xcd, RawFrm, (outs), (ins i8imm:$trap), "int\t$trap",
47 def SYSCALL : I<0x05, RawFrm, (outs), (ins), "syscall", []>, TB;
[all …]
DX86InstrFPStack.td76 def FP32_TO_INT16_IN_MEM : PseudoI<(outs), (ins i16mem:$dst, RFP32:$src),
78 def FP32_TO_INT32_IN_MEM : PseudoI<(outs), (ins i32mem:$dst, RFP32:$src),
80 def FP32_TO_INT64_IN_MEM : PseudoI<(outs), (ins i64mem:$dst, RFP32:$src),
82 def FP64_TO_INT16_IN_MEM : PseudoI<(outs), (ins i16mem:$dst, RFP64:$src),
84 def FP64_TO_INT32_IN_MEM : PseudoI<(outs), (ins i32mem:$dst, RFP64:$src),
86 def FP64_TO_INT64_IN_MEM : PseudoI<(outs), (ins i64mem:$dst, RFP64:$src),
88 def FP80_TO_INT16_IN_MEM : PseudoI<(outs), (ins i16mem:$dst, RFP80:$src),
90 def FP80_TO_INT32_IN_MEM : PseudoI<(outs), (ins i32mem:$dst, RFP80:$src),
92 def FP80_TO_INT64_IN_MEM : PseudoI<(outs), (ins i64mem:$dst, RFP80:$src),
116 def FpPOP_RETVAL : FpI_<(outs RFP80:$dst), (ins), SpecialFP, []>;
[all …]
DX86InstrFormats.td119 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
129 dag OutOperandList = outs;
183 class I<bits<8> o, Format f, dag outs, dag ins, string asm,
185 : X86Inst<o, f, NoImm, outs, ins, asm, d> {
189 class Ii8 <bits<8> o, Format f, dag outs, dag ins, string asm,
191 : X86Inst<o, f, Imm8, outs, ins, asm, d> {
195 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm,
197 : X86Inst<o, f, Imm8PCRel, outs, ins, asm> {
201 class Ii16<bits<8> o, Format f, dag outs, dag ins, string asm,
203 : X86Inst<o, f, Imm16, outs, ins, asm> {
[all …]
DX86InstrShiftRotate.td20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
29 def SHL64rCL : RI<0xD3, MRM4r, (outs GR64:$dst), (ins GR64:$src1),
34 def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2),
39 def SHL16ri : Ii8<0xC1, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2),
42 def SHL32ri : Ii8<0xC1, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2),
45 def SHL64ri : RIi8<0xC1, MRM4r, (outs GR64:$dst),
52 def SHL8r1 : I<0xD0, MRM4r, (outs GR8:$dst), (ins GR8:$src1),
54 def SHL16r1 : I<0xD1, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
18 dag OutOperandList = outs;
25 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
26 : InstXCore<outs, ins, asmstr, pattern>;
32 class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
33 : InstXCore<outs, ins, asmstr, pattern> {
37 class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
38 : InstXCore<outs, ins, asmstr, pattern> {
42 class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
43 : InstXCore<outs, ins, asmstr, pattern> {
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstrSPE.td73 def EVLDD : EVXForm_D<769, (outs gprc:$RT), (ins spe8dis:$dst),
75 def EVLDW : EVXForm_D<771, (outs gprc:$RT), (ins spe8dis:$dst),
77 def EVLDH : EVXForm_D<773, (outs gprc:$RT), (ins spe8dis:$dst),
79 def EVLHHESPLAT : EVXForm_D<777, (outs gprc:$RT), (ins spe2dis:$dst),
81 def EVLHHOUSPLAT : EVXForm_D<781, (outs gprc:$RT), (ins spe2dis:$dst),
83 def EVLHHOSSPLAT : EVXForm_D<783, (outs gprc:$RT), (ins spe2dis:$dst),
85 def EVLWHE : EVXForm_D<785, (outs gprc:$RT), (ins spe4dis:$dst),
87 def EVLWHOU : EVXForm_D<789, (outs gprc:$RT), (ins spe4dis:$dst),
89 def EVLWHOS : EVXForm_D<791, (outs gprc:$RT), (ins spe4dis:$dst),
91 def EVLWWSPLAT : EVXForm_D<793, (outs gprc:$RT), (ins spe4dis:$dst),
[all …]
DPPCInstr64Bit.td86 def BLR8 : XLForm_2_ext<19, 16, 20, 0, 0, (outs), (ins), "blr", IIC_BrB,
89 def BCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", IIC_BrB,
92 def BCCCTR8 : XLForm_2_br<19, 528, 0, (outs), (ins pred:$cond),
97 def BCCTR8 : XLForm_2_br2<19, 528, 12, 0, (outs), (ins crbitrc:$bi),
100 def BCCTR8n : XLForm_2_br2<19, 528, 4, 0, (outs), (ins crbitrc:$bi),
107 def MovePCtoLR8 : Pseudo<(outs), (ins), "#MovePCtoLR8", []>,
112 def BDZ8 : BForm_1<16, 18, 0, 0, (outs), (ins condbrtarget:$dst),
114 def BDNZ8 : BForm_1<16, 16, 0, 0, (outs), (ins condbrtarget:$dst),
119 def BDZLR8 : XLForm_2_ext<19, 16, 18, 0, 0, (outs), (ins),
121 def BDNZLR8 : XLForm_2_ext<19, 16, 16, 0, 0, (outs), (ins),
[all …]
/external/llvm/lib/Target/X86/
DX86InstrSystem.td18 def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)], IIC_RDTSC>,
22 def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", [(X86rdtscp)]>, TB;
27 def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
28 def UD2B : I<0xB9, RawFrm, (outs), (ins), "ud2b", []>, TB;
31 def HLT : I<0xF4, RawFrm, (outs), (ins), "hlt", [], IIC_HLT>;
32 def RSM : I<0xAA, RawFrm, (outs), (ins), "rsm", [], IIC_RSM>, TB;
36 def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
37 def INT3 : I<0xcc, RawFrm, (outs), (ins), "int3",
47 def INT : Ii8<0xcd, RawFrm, (outs), (ins u8imm:$trap), "int\t$trap",
51 def SYSCALL : I<0x05, RawFrm, (outs), (ins), "syscall", [], IIC_SYSCALL>, TB;
[all …]
DX86InstrFPStack.td78 def FP32_TO_INT16_IN_MEM : PseudoI<(outs), (ins i16mem:$dst, RFP32:$src),
80 def FP32_TO_INT32_IN_MEM : PseudoI<(outs), (ins i32mem:$dst, RFP32:$src),
82 def FP32_TO_INT64_IN_MEM : PseudoI<(outs), (ins i64mem:$dst, RFP32:$src),
84 def FP64_TO_INT16_IN_MEM : PseudoI<(outs), (ins i16mem:$dst, RFP64:$src),
86 def FP64_TO_INT32_IN_MEM : PseudoI<(outs), (ins i32mem:$dst, RFP64:$src),
88 def FP64_TO_INT64_IN_MEM : PseudoI<(outs), (ins i64mem:$dst, RFP64:$src),
90 def FP80_TO_INT16_IN_MEM : PseudoI<(outs), (ins i16mem:$dst, RFP80:$src),
92 def FP80_TO_INT32_IN_MEM : PseudoI<(outs), (ins i32mem:$dst, RFP80:$src),
94 def FP80_TO_INT64_IN_MEM : PseudoI<(outs), (ins i64mem:$dst, RFP80:$src),
121 class FpIf32<dag outs, dag ins, FPFormat fp, list<dag> pattern> :
[all …]
DX86InstrControl.td24 def RETL : I <0xC3, RawFrm, (outs), (ins variable_ops),
27 def RETQ : I <0xC3, RawFrm, (outs), (ins variable_ops),
30 def RETW : I <0xC3, RawFrm, (outs), (ins),
33 def RETIL : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
37 def RETIQ : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt, variable_ops),
41 def RETIW : Ii16<0xC2, RawFrm, (outs), (ins i16imm:$amt),
44 def LRETL : I <0xCB, RawFrm, (outs), (ins),
46 def LRETQ : RI <0xCB, RawFrm, (outs), (ins),
48 def LRETW : I <0xCB, RawFrm, (outs), (ins),
50 def LRETIL : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormatsV60.td42 class CVI_VA_Resource<dag outs, dag ins, string asmstr,
45 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VA>,
48 class CVI_VA_DV_Resource<dag outs, dag ins, string asmstr,
51 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VA_DV>,
54 class CVI_VX_Resource_long<dag outs, dag ins, string asmstr,
57 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VX>,
60 class CVI_VX_Resource_late<dag outs, dag ins, string asmstr,
63 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VX>,
66 class CVI_VX_Resource<dag outs, dag ins, string asmstr,
69 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VX>,
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/external/llvm/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
18 dag OutOperandList = outs;
27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
28 : InstXCore<0, outs, ins, asmstr, pattern> {
36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
37 : InstXCore<2, outs, ins, asmstr, pattern> {
45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
46 : _F3R<opc, outs, ins, asmstr, pattern> {
50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
51 : InstXCore<4, outs, ins, asmstr, pattern> {
[all …]
/external/llvm/lib/Target/MSP430/
DMSP430InstrFormats.td54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f,
60 dag OutOperandList = outs;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
79 : MSP430Inst<outs, ins, sz, DoubleOpFrm, asmstr> {
93 dag outs, dag ins, string asmstr, list<dag> pattern>
94 : IForm<opcode, dest, 1, src, sz, outs, ins, asmstr, pattern>;
97 dag outs, dag ins, string asmstr, list<dag> pattern>
98 : IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
101 dag outs, dag ins, string asmstr, list<dag> pattern>
102 : IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430InstrFormats.td54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f,
60 dag OutOperandList = outs;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
79 : MSP430Inst<outs, ins, sz, DoubleOpFrm, asmstr> {
93 dag outs, dag ins, string asmstr, list<dag> pattern>
94 : IForm<opcode, dest, 1, src, sz, outs, ins, asmstr, pattern>;
97 dag outs, dag ins, string asmstr, list<dag> pattern>
98 : IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
101 dag outs, dag ins, string asmstr, list<dag> pattern>
102 : IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
[all …]
/external/swiftshader/third_party/LLVM/tools/bugpoint/
DFindBugs.cpp35 outs() << "Starting bug finding procedure...\n\n"; in runManyPasses()
40 outs() << "\n"; in runManyPasses()
42 outs() << "Generating reference output from raw program: \n"; in runManyPasses()
59 outs() << "Running selected passes on program to test for crash: "; in runManyPasses()
61 outs() << "-" << PassesToRun[i] << " "; in runManyPasses()
66 outs() << "\n"; in runManyPasses()
67 outs() << "Optimizer passes caused failure!\n\n"; in runManyPasses()
71 outs() << "Combination " << num << " optimized successfully!\n"; in runManyPasses()
77 outs() << "Running the code generator to test for a crash: "; in runManyPasses()
81 outs() << "\n*** compileProgram threw an exception: "; in runManyPasses()
[all …]
/external/llvm/tools/bugpoint/
DFindBugs.cpp36 outs() << "Starting bug finding procedure...\n\n"; in runManyPasses()
41 outs() << "\n"; in runManyPasses()
43 outs() << "Generating reference output from raw program: \n"; in runManyPasses()
60 outs() << "Running selected passes on program to test for crash: "; in runManyPasses()
62 outs() << "-" << PassesToRun[i] << " "; in runManyPasses()
67 outs() << "\n"; in runManyPasses()
68 outs() << "Optimizer passes caused failure!\n\n"; in runManyPasses()
72 outs() << "Combination " << num << " optimized successfully!\n"; in runManyPasses()
78 outs() << "Running the code generator to test for a crash: "; in runManyPasses()
82 outs() << "\n*** compileProgram threw an exception: "; in runManyPasses()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrFormats.td45 class InstSystemZ<bits<16> op, Format f, dag outs, dag ins> : Instruction {
53 dag OutOperandList = outs;
57 class I8<bits<8> op, Format f, dag outs, dag ins, string asmstr,
59 : InstSystemZ<0, f, outs, ins> {
67 class I12<bits<12> op, Format f, dag outs, dag ins, string asmstr,
69 : InstSystemZ<0, f, outs, ins> {
77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr,
79 : InstSystemZ<op, f, outs, ins> {
84 class RRI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
85 : I8<op, RRForm, outs, ins, asmstr, pattern>;
[all …]
DSystemZInstrInfo.td71 def ADJCALLSTACKDOWN : Pseudo<(outs), (ins i64imm:$amt),
74 def ADJCALLSTACKUP : Pseudo<(outs), (ins i64imm:$amt1, i64imm:$amt2),
79 def Select32 : Pseudo<(outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$cc),
83 def Select64 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$cc),
96 def RET : Pseudo<(outs), (ins), "br\t%r14", [(SystemZretflag)]>;
101 def JMP : Pseudo<(outs), (ins brtarget:$dst), "j\t{$dst}", [(br bb:$dst)]>;
104 def JMPr : Pseudo<(outs), (ins GR64:$dst), "br\t{$dst}", [(brind GR64:$dst)]>;
108 def JO : Pseudo<(outs), (ins brtarget:$dst),
111 def JH : Pseudo<(outs), (ins brtarget:$dst),
114 def JNLE: Pseudo<(outs), (ins brtarget:$dst),
[all …]
DSystemZInstrFP.td29 def SelectF32 : Pseudo<(outs FP32:$dst), (ins FP32:$src1, FP32:$src2, i8imm:$cc),
33 def SelectF64 : Pseudo<(outs FP64:$dst), (ins FP64:$src1, FP64:$src2, i8imm:$cc),
44 def LD_Fp032 : Pseudo<(outs FP32:$dst), (ins),
47 def LD_Fp064 : Pseudo<(outs FP64:$dst), (ins),
53 def FMOV32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
56 def FMOV64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
62 def FMOV32rm : Pseudo<(outs FP32:$dst), (ins rriaddr12:$src),
65 def FMOV32rmy : Pseudo<(outs FP32:$dst), (ins rriaddr:$src),
68 def FMOV64rm : Pseudo<(outs FP64:$dst), (ins rriaddr12:$src),
71 def FMOV64rmy : Pseudo<(outs FP64:$dst), (ins rriaddr:$src),
[all …]
/external/llvm/tools/llvm-bcanalyzer/
Dllvm-bcanalyzer.cpp433 outs() << " num-strings = " << NumStrings << " {\n"; in decodeMetadataStringsBlob()
452 outs() << Indent << " '"; in decodeMetadataStringsBlob()
453 outs().write_escaped(Strings.slice(0, Size), /*hex=*/true); in decodeMetadataStringsBlob()
454 outs() << "'\n"; in decodeMetadataStringsBlob()
458 outs() << Indent << " }"; in decodeMetadataStringsBlob()
487 if (Dump) outs() << Indent << "<BLOCKINFO_BLOCK/>\n"; in ParseBlock()
503 outs() << Indent << "<"; in ParseBlock()
506 outs() << BlockName; in ParseBlock()
508 outs() << "UnknownBlock" << BlockID; in ParseBlock()
511 outs() << " BlockID=" << BlockID; in ParseBlock()
[all …]
/external/llvm/tools/llvm-readobj/
DCOFFImportDumper.cpp27 outs() << '\n'; in dumpCOFFImportFile()
28 outs() << "File: " << File->getFileName() << "\n"; in dumpCOFFImportFile()
29 outs() << "Format: COFF-import-file\n"; in dumpCOFFImportFile()
33 case COFF::IMPORT_CODE: outs() << "Type: code\n"; break; in dumpCOFFImportFile()
34 case COFF::IMPORT_DATA: outs() << "Type: data\n"; break; in dumpCOFFImportFile()
35 case COFF::IMPORT_CONST: outs() << "Type: const\n"; break; in dumpCOFFImportFile()
39 case COFF::IMPORT_ORDINAL: outs() << "Name type: ordinal\n"; break; in dumpCOFFImportFile()
40 case COFF::IMPORT_NAME: outs() << "Name type: name\n"; break; in dumpCOFFImportFile()
41 case COFF::IMPORT_NAME_NOPREFIX: outs() << "Name type: noprefix\n"; break; in dumpCOFFImportFile()
42 case COFF::IMPORT_NAME_UNDECORATE: outs() << "Name type: undecorate\n"; break; in dumpCOFFImportFile()
[all …]

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