Searched refs:pipe_config (Results 1 – 14 of 14) sorted by relevance
209 FakeNetworkPipe::Config pipe_config; in Loopback() local210 pipe_config.loss_percent = flags::LossPercent(); in Loopback()211 pipe_config.link_capacity_kbps = flags::LinkCapacityKbps(); in Loopback()212 pipe_config.queue_length_packets = flags::QueueSize(); in Loopback()213 pipe_config.queue_delay_ms = flags::AvgPropagationDelayMs(); in Loopback()214 pipe_config.delay_standard_deviation_ms = flags::StdPropagationDelayMs(); in Loopback()232 pipe_config, in Loopback()
198 FakeNetworkPipe::Config pipe_config; in Loopback() local199 pipe_config.loss_percent = flags::LossPercent(); in Loopback()200 pipe_config.link_capacity_kbps = flags::LinkCapacityKbps(); in Loopback()201 pipe_config.queue_length_packets = flags::QueueSize(); in Loopback()202 pipe_config.queue_delay_ms = flags::AvgPropagationDelayMs(); in Loopback()203 pipe_config.delay_standard_deviation_ms = flags::StdPropagationDelayMs(); in Loopback()221 pipe_config, in Loopback()
99 unsigned int pipe_config : 5; member129 unsigned int pipe_config : 5; member
152 unsigned pipe_config; in si_dma_copy_tile() local191 pipe_config = G_009910_PIPE_CONFIG(tile_mode); in si_dma_copy_tile()209 radeon_emit(cs, (slice_tile_max << 0) | (pipe_config << 26)); in si_dma_copy_tile()
205 uint32_t pipe_config; member237 unsigned pipe_config; member
442 metadata->pipe_config = surface->pipe_config; in radv_init_metadata()
237 unsigned pipe_config; member328 unsigned pipe_config:5; /* max 17 */ member
291 metadata->pipe_config = surface->pipe_config; in r600_texture_init_metadata()915 rtex->surface.tile_split, rtex->surface.pipe_config, in r600_print_texture_info()1258 surface.pipe_config = metadata.pipe_config; in r600_texture_from_handle()
415 AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in radv_amdgpu_winsys_surface_init()468 surf->pipe_config = AddrSurfInfoOut.pTileInfo->pipeConfig - 1; in radv_amdgpu_winsys_surface_init()
267 tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, md->pipe_config); in radv_amdgpu_winsys_bo_set_metadata()
449 AddrTileInfoIn.pipeConfig = surf->pipe_config + 1; /* +1 compared to GB_TILE_MODE */ in amdgpu_surface_init()509 surf->pipe_config = AddrSurfInfoOut.pTileInfo->pipeConfig - 1; in amdgpu_surface_init()
619 md->pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in amdgpu_buffer_get_metadata()647 tiling_flags |= AMDGPU_TILING_SET(PIPE_CONFIG, md->pipe_config); in amdgpu_buffer_set_metadata()
1239 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1); in ReadGbTileMode()
2538 pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1); in ReadGbTileMode()