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/external/linux-kselftest/tools/testing/selftests/powerpc/switch_endian/
Dcheck.S13 mr r9,r15
14 cmpd r9,r3 # check r3
16 addi r9,r15,4 # check r4
17 cmpd r9,r4
19 lis r9,0x00FF # check CR
20 ori r9,r9,0xF000
22 and r10,r10,r9
23 cmpw r9,r10
24 addi r9,r15,34
26 addi r9,r15,32 # check LR
[all …]
/external/libxaac/decoder/armv7/
Dixheaacd_decorr_filter2.s37 LDR r9, [r13, #44]
48 ADD r11, r9, #0x0150
64 ADD r2, r9, #0x012
132 MOV r9, #20
134 STR r9, [r13, #-4]!
145 SMULBB r9, r7, r8
158 QSUB r9, r9, r10
165 MOV r7, r9, asr #15
169 LDR r9, [r4]
175 SMULBT r3, r10, r9
[all …]
Dixheaacd_tns_ar_filter_fixed_32x16.s67 MOV r9, r8, asr r1
70 STR r9, [r0], #4
80 LDRSH r9 , [r3 , r5]
83 SMLAWB r11 , r10, r9, r11
88 MOV r9, r8, asr r1
89 STR r9 , [r0], #4
112 LDR r9 , [r3 , r5]
119 SMLAWB r11, r10 , r9, r11
120 LDR r9 , [r3 , r5]
123 SMLAWT r11, r2 , r9, r11
[all …]
Dixheaacd_auto_corr.s49 SMULWT r9, r5, r6
52 SUB r11, r9, r11
55 SMULWT r9, r6, r6
60 SUB r14, r9, r14
64 MOV r9, #0
71 SMLAWT r9, r5, r5, r9
76 SMLAWT r9, r4, r4, r9
84 SMLAWT r9, r6, r6, r9
93 SMLAWT r9, r5, r5, r9
99 SMLAWT r9, r4, r4, r9
[all …]
/external/boringssl/linux-arm/crypto/fipsmodule/
Dsha1-armv4-large.S31 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
44 ldrb r9,[r1,#3]
48 orr r9,r9,r10,lsl#8
50 orr r9,r9,r11,lsl#16
52 orr r9,r9,r12,lsl#24
54 ldr r9,[r1],#4 @ handles unaligned
59 rev r9,r9 @ byte swap
63 add r7,r7,r9 @ E+=X[i]
65 str r9,[r14,#-4]!
69 ldrb r9,[r1,#3]
[all …]
Daes-armv4.S274 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
276 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
298 and r9,lr,r0,lsr#16
305 ldr r6,[r10,r9,lsl#2] @ Te1[s0>>16]
306 and r9,lr,r1,lsr#8
312 ldr r9,[r10,r9,lsl#2] @ Te2[s1>>8]
318 eor r6,r6,r9,ror#8
319 and r9,lr,r2
325 ldr r9,[r10,r9,lsl#2] @ Te3[s2>>0]
331 eor r6,r6,r9,ror#16
[all …]
/external/boringssl/ios-arm/crypto/fipsmodule/
Dsha1-armv4-large.S32 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
45 ldrb r9,[r1,#3]
49 orr r9,r9,r10,lsl#8
51 orr r9,r9,r11,lsl#16
53 orr r9,r9,r12,lsl#24
55 ldr r9,[r1],#4 @ handles unaligned
60 rev r9,r9 @ byte swap
64 add r7,r7,r9 @ E+=X[i]
66 str r9,[r14,#-4]!
70 ldrb r9,[r1,#3]
[all …]
Daes-armv4.S275 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
277 ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
301 and r9,lr,r0,lsr#16
308 ldr r6,[r10,r9,lsl#2] @ Te1[s0>>16]
309 and r9,lr,r1,lsr#8
315 ldr r9,[r10,r9,lsl#2] @ Te2[s1>>8]
321 eor r6,r6,r9,ror#8
322 and r9,lr,r2
328 ldr r9,[r10,r9,lsl#2] @ Te3[s2>>0]
334 eor r6,r6,r9,ror#16
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-rd-rn-rm-t32.cc106 {{r3, r9, r2}, false, al, "r3 r9 r2", "r3_r9_r2"},
110 {{r9, r1, r8}, false, al, "r9 r1 r8", "r9_r1_r8"},
115 {{r12, r12, r9}, false, al, "r12 r12 r9", "r12_r12_r9"},
123 {{r11, r8, r9}, false, al, "r11 r8 r9", "r11_r8_r9"},
126 {{r9, r8, r13}, false, al, "r9 r8 r13", "r9_r8_r13"},
133 {{r14, r9, r9}, false, al, "r14 r9 r9", "r14_r9_r9"},
164 {{r9, r1, r10}, false, al, "r9 r1 r10", "r9_r1_r10"},
165 {{r10, r9, r12}, false, al, "r10 r9 r12", "r10_r9_r12"},
166 {{r10, r8, r9}, false, al, "r10 r8 r9", "r10_r8_r9"},
171 {{r1, r9, r4}, false, al, "r1 r9 r4", "r1_r9_r4"},
[all …]
Dtest-assembler-rd-rn-rm-a32.cc106 {{r3, r9, r2}, false, al, "r3 r9 r2", "r3_r9_r2"},
110 {{r9, r1, r8}, false, al, "r9 r1 r8", "r9_r1_r8"},
115 {{r12, r12, r9}, false, al, "r12 r12 r9", "r12_r12_r9"},
123 {{r11, r8, r9}, false, al, "r11 r8 r9", "r11_r8_r9"},
126 {{r9, r8, r13}, false, al, "r9 r8 r13", "r9_r8_r13"},
133 {{r14, r9, r9}, false, al, "r14 r9 r9", "r14_r9_r9"},
164 {{r9, r1, r10}, false, al, "r9 r1 r10", "r9_r1_r10"},
165 {{r10, r9, r12}, false, al, "r10 r9 r12", "r10_r9_r12"},
166 {{r10, r8, r9}, false, al, "r10 r8 r9", "r10_r8_r9"},
171 {{r1, r9, r4}, false, al, "r1 r9 r4", "r1_r9_r4"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc146 {{ls, r10, r2, r2, LSL, r9},
151 {{eq, r12, r7, r9, LSR, r7},
161 {{lt, r9, r0, r9, ASR, r12},
181 {{al, r5, r8, r9, ASR, r14},
211 {{vc, r11, r10, r11, LSL, r9},
241 {{lt, r8, r8, r9, ASR, r0},
271 {{le, r9, r3, r0, LSL, r7},
281 {{pl, r9, r13, r11, LSL, r7},
291 {{mi, r3, r9, r13, ROR, r10},
326 {{lt, r2, r14, r11, LSL, r9},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-a32.cc131 {{ls, r0, r9, r9}, false, al, "ls r0 r9 r9", "ls_r0_r9_r9"},
134 {{le, r9, r12, r2}, false, al, "le r9 r12 r2", "le_r9_r12_r2"},
138 {{gt, r2, r4, r9}, false, al, "gt r2 r4 r9", "gt_r2_r4_r9"},
139 {{le, r3, r9, r10}, false, al, "le r3 r9 r10", "le_r3_r9_r10"},
140 {{gt, r11, r1, r9}, false, al, "gt r11 r1 r9", "gt_r11_r1_r9"},
142 {{cs, r12, r9, r3}, false, al, "cs r12 r9 r3", "cs_r12_r9_r3"},
143 {{eq, r9, r14, r10}, false, al, "eq r9 r14 r10", "eq_r9_r14_r10"},
144 {{gt, r9, r0, r1}, false, al, "gt r9 r0 r1", "gt_r9_r0_r1"},
154 {{pl, r1, r0, r9}, false, al, "pl r1 r0 r9", "pl_r1_r0_r9"},
156 {{vs, r7, r9, r9}, false, al, "vs r7 r9 r9", "vs_r7_r9_r9"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-t32.cc129 {{{al, r12, r9, r11}, false, al, "al r12 r9 r11", "al_r12_r9_r11"},
132 {{al, r9, r9, r13}, false, al, "al r9 r9 r13", "al_r9_r9_r13"},
135 {{al, r11, r6, r9}, false, al, "al r11 r6 r9", "al_r11_r6_r9"},
141 {{al, r9, r13, r7}, false, al, "al r9 r13 r7", "al_r9_r13_r7"},
147 {{al, r4, r9, r0}, false, al, "al r4 r9 r0", "al_r4_r9_r0"},
160 {{al, r9, r2, r11}, false, al, "al r9 r2 r11", "al_r9_r2_r11"},
161 {{al, r9, r9, r10}, false, al, "al r9 r9 r10", "al_r9_r9_r10"},
162 {{al, r11, r9, r13}, false, al, "al r11 r9 r13", "al_r11_r9_r13"},
164 {{al, r9, r4, r7}, false, al, "al r9 r4 r7", "al_r9_r4_r7"},
167 {{al, r7, r9, r7}, false, al, "al r7 r9 r7", "al_r7_r9_r7"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc136 {{al, r9, r6, r3, LSR, 13},
151 {{al, r2, r9, r12, LSR, 24},
171 {{al, r9, r4, r8, ASR, 27},
181 {{al, r0, r2, r9, ASR, 24},
226 {{al, r9, r13, r9, ASR, 6},
236 {{al, r9, r3, r14, LSR, 30},
256 {{al, r0, r9, r0, LSR, 2},
271 {{al, r9, r14, r13, ASR, 21},
301 {{al, r5, r0, r9, LSR, 30},
306 {{al, r4, r9, r3, ASR, 17},
[all …]
Dtest-assembler-cond-rd-rn-operand-const-a32.cc114 const TestData kTests[] = {{{le, r9, r4, 0x03fc0000},
154 {{vs, r2, r9, 0x00000ff0},
189 {{mi, r3, r9, 0x03fc0000},
214 {{hi, r11, r9, 0x000000ab},
274 {{vs, r9, r4, 0xb000000a},
299 {{hi, r5, r9, 0x003fc000},
314 {{eq, r9, r5, 0xb000000a},
454 {{ge, r9, r8, 0x002ac000},
464 {{gt, r2, r9, 0x0ff00000},
474 {{ls, r0, r9, 0xfc000003},
[all …]
Dtest-assembler-cond-rd-operand-rn-in-it-block-t32.cc105 {{eq, r0, r9}, true, eq, "eq r0 r9", "eq_r0_r9"},
120 {{eq, r1, r9}, true, eq, "eq r1 r9", "eq_r1_r9"},
135 {{eq, r2, r9}, true, eq, "eq r2 r9", "eq_r2_r9"},
150 {{eq, r3, r9}, true, eq, "eq r3 r9", "eq_r3_r9"},
165 {{eq, r4, r9}, true, eq, "eq r4 r9", "eq_r4_r9"},
180 {{eq, r5, r9}, true, eq, "eq r5 r9", "eq_r5_r9"},
195 {{eq, r6, r9}, true, eq, "eq r6 r9", "eq_r6_r9"},
210 {{eq, r7, r9}, true, eq, "eq r7 r9", "eq_r7_r9"},
225 {{eq, r8, r9}, true, eq, "eq r8 r9", "eq_r8_r9"},
231 {{eq, r9, r0}, true, eq, "eq r9 r0", "eq_r9_r0"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-rd-is-rn-in-it-block-t32.cc102 {{eq, r4, r4, r9}, true, eq, "eq r4 r4 r9", "eq_r4_r4_r9"},
144 {{hi, r9, r9, r6}, true, hi, "hi r9 r9 r6", "hi_r9_r9_r6"},
149 {{mi, r9, r9, r7}, true, mi, "mi r9 r9 r7", "mi_r9_r9_r7"},
154 {{gt, r14, r14, r9}, true, gt, "gt r14 r14 r9", "gt_r14_r14_r9"},
159 {{ls, r7, r7, r9}, true, ls, "ls r7 r7 r9", "ls_r7_r7_r9"},
160 {{vc, r9, r9, r12}, true, vc, "vc r9 r9 r12", "vc_r9_r9_r12"},
162 {{lt, r14, r14, r9}, true, lt, "lt r14 r14 r9", "lt_r14_r14_r9"},
173 {{lt, r13, r13, r9}, true, lt, "lt r13 r13 r9", "lt_r13_r13_r9"},
177 {{vc, r9, r9, r11}, true, vc, "vc r9 r9 r11", "vc_r9_r9_r11"},
179 {{eq, r9, r9, r3}, true, eq, "eq r9 r9 r3", "eq_r9_r9_r3"},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc132 {{cc, r12, r9, r11, ROR, 16},
142 {{mi, r9, r1, r6, ROR, 16},
147 {{le, r8, r9, r14, ROR, 8},
167 {{al, r6, r8, r9, ROR, 16},
192 {{cc, r1, r3, r9, ROR, 24},
197 {{mi, r9, r5, r4, ROR, 8},
222 {{lt, r9, r14, r14, ROR, 24},
262 {{gt, r4, r9, r13, ROR, 16},
272 {{vc, r4, r13, r9, ROR, 16},
277 {{hi, r8, r9, r4, ROR, 8},
[all …]
Dtest-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc156 {{ne, r2, r9, r2, LSL, 3},
176 {{vs, r1, r6, r9, ROR, 14},
181 {{cs, r9, r10, r12, LSL, 27},
221 {{pl, r13, r12, r9, ROR, 25},
246 {{eq, r14, r10, r9, ROR, 5},
266 {{hi, r9, r12, r1, LSL, 16},
271 {{cs, r9, r11, r3, ROR, 23},
286 {{gt, r1, r9, r4, LSL, 29},
316 {{mi, r13, r3, r9, ROR, 4},
326 {{ne, r6, r0, r9, LSL, 16},
[all …]
/external/tremolo/Tremolo/
DmdctARM.s189 LDMFD r12,{r8,r9,r10} @ r8 = step
190 @ r9 = wL
198 LDR r11,[r9],#4 @ r11= *wL++
228 LDMFD r12,{r8,r9,r10} @ r8 = step
229 @ r9 = wL
237 LDR r11,[r9],#4 @ r11= *wL++
326 SMULL r8, r9, r7, r11 @ (r8, r9) = s2*T[1]
329 SMLAL r8, r9, r6, r10 @ (r8, r9) += s0*T[0]
333 MOV r9, r9, LSL #1
336 STR r9, [r4],#-16 @ aX[0] = r9
[all …]
DmdctLARM.s187 LDMFD r12,{r8,r9,r10} @ r8 = step
188 @ r9 = wL
198 LDRB r11,[r9],#1 @ r11= *wL++
227 LDMFD r12,{r8,r9,r10} @ r8 = step
228 @ r9 = wL
237 LDRB r11,[r9],#1 @ r11= *wL++
327 MUL r9, r6, r10 @ r9 = s0*T[0]
329 MLA r9, r7, r11,r9 @ r9 += s2*T[1]
332 STR r9, [r4,#16] @ aX[0] = r9
347 MUL r9, r6, r10 @ r9 = s0*T[1]
[all …]
/external/capstone/suite/MC/ARM/
Darm-memory-instructions.s.cs7 0x00,0x90,0x12,0xe4 = ldr r9, [r2], #-0
10 0x09,0x10,0xb5,0xe7 = ldr r1, [r5, r9]!
13 0x02,0x50,0x99,0xe6 = ldr r5, [r9], r2
19 0xff,0x9f,0xf3,0xe5 = ldrb r9, [r3, #4095]!
22 0x05,0x90,0xd8,0xe7 = ldrb r9, [r8, r5]
25 0x03,0x60,0x79,0xe7 = ldrb r6, [r9, -r3]!
29 0xc9,0x57,0xd2,0xe6 = ldrb r5, [r2], r9, asr #15
36 0xd0,0x02,0xe9,0xe1 = ldrd r0, r1, [r9, #32]!
52 0xb2,0x90,0x97,0xe0 = ldrh r9, [r7], r2
54 0xb0,0x98,0xf7,0xe0 = ldrht r9, [r7], #128
[all …]
Dbasic-arm-instructions.s.cs25 0x18,0x69,0xa7,0xe0 = adc r6, r7, r8, lsl r9
26 0x38,0x69,0xa7,0xe0 = adc r6, r7, r8, lsr r9
27 0x58,0x69,0xa7,0xe0 = adc r6, r7, r8, asr r9
28 0x78,0x69,0xa7,0xe0 = adc r6, r7, r8, ror r9
42 0x17,0x69,0xa6,0xe0 = adc r6, r6, r7, lsl r9
43 0x37,0x69,0xa6,0xe0 = adc r6, r6, r7, lsr r9
44 0x57,0x69,0xa6,0xe0 = adc r6, r6, r7, asr r9
45 0x77,0x69,0xa6,0xe0 = adc r6, r6, r7, ror r9
54 0x18,0x69,0x87,0xe0 = add r6, r7, r8, lsl r9
55 0x13,0x49,0x84,0xe0 = add r4, r4, r3, lsl r9
[all …]
/external/boringssl/ios-arm/crypto/chacha/
Dchacha-armv4.S70 ldmia r3,{r4,r5,r6,r7,r8,r9,r10,r11} @ load key
72 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11} @ copy key
80 ldmia sp,{r0,r1,r2,r3,r4,r5,r6,r7,r8,r9} @ load key material
104 add r9,r9,r10
107 eor r5,r5,r9,ror#20
116 add r9,r9,r10
121 eor r5,r5,r9,ror#25
126 str r9,[sp,#4*(16+9)]
127 ldr r9,[sp,#4*(16+11)]
134 add r9,r9,r10
[all …]
/external/boringssl/linux-arm/crypto/chacha/
Dchacha-armv4.S69 ldmia r3,{r4,r5,r6,r7,r8,r9,r10,r11} @ load key
71 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11} @ copy key
79 ldmia sp,{r0,r1,r2,r3,r4,r5,r6,r7,r8,r9} @ load key material
103 add r9,r9,r10
106 eor r5,r5,r9,ror#20
115 add r9,r9,r10
120 eor r5,r5,r9,ror#25
125 str r9,[sp,#4*(16+9)]
126 ldr r9,[sp,#4*(16+11)]
133 add r9,r9,r10
[all …]

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