| /external/llvm/test/CodeGen/ARM/ |
| D | rbit.ll | 3 ; CHECK-LABEL: rbit
4 ; CHECK: rbit r0, r0
5 define i32 @rbit(i32 %t) {
7 %rbit = call i32 @llvm.arm.rbit(i32 %t)
8 ret i32 %rbit
13 ; CHECK: rbit r0, r0
16 %rbit.i = call i32 @llvm.arm.rbit(i32 0)
17 ret i32 %rbit.i
20 declare i32 @llvm.arm.rbit(i32)
25 ; CHECK: rbit r0, r0
[all …]
|
| D | cttz.ll | 16 ; CHECK: rbit
25 ; CHECK: rbit
33 ; CHECK: rbit
41 ; CHECK: rbit
42 ; CHECK: rbit
56 ; CHECK: rbit
65 ; CHECK: rbit
74 ; CHECK: rbit
82 ; CHECK: rbit
83 ; CHECK: rbit
|
| D | bit-reverse-to-rbit.ll | 8 ;CHECK-NOT: rbit
9 ;RBIT: rbit
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | rbit.ll | 4 ; CHECK: rbit w0, w0
7 %rbit.i = call i32 @llvm.aarch64.rbit.i32(i32 %t)
8 ret i32 %rbit.i
12 ; CHECK: rbit x0, x0
15 %rbit.i = call i64 @llvm.aarch64.rbit.i64(i64 %t)
16 ret i64 %rbit.i
19 declare i64 @llvm.aarch64.rbit.i64(i64)
20 declare i32 @llvm.aarch64.rbit.i32(i32)
|
| D | arm64-vbitwise.ll | 5 ;CHECK: rbit.8b
7 %tmp3 = call <8 x i8> @llvm.aarch64.neon.rbit.v8i8(<8 x i8> %tmp1)
13 ;CHECK: rbit.16b
15 %tmp3 = call <16 x i8> @llvm.aarch64.neon.rbit.v16i8(<16 x i8> %tmp1)
19 declare <8 x i8> @llvm.aarch64.neon.rbit.v8i8(<8 x i8>) nounwind readnone
20 declare <16 x i8> @llvm.aarch64.neon.rbit.v16i8(<16 x i8>) nounwind readnone
|
| D | dp1.ll | 89 ; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}}
99 ; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}}
109 ; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}}
119 ; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}}
|
| /external/libnl/lib/route/qdisc/ |
| D | htb.c | 135 double r, rbit; in htb_class_dump_line() local
139 rbit = nl_cancel_down_bits(htb->ch_rate.rs_rate*8, &rubit); in htb_class_dump_line()
142 r, ru, rbit, rubit, 1<<htb->ch_rate.rs_cell_log); in htb_class_dump_line()
156 double r, rbit; in htb_class_dump_details() local
160 rbit = nl_cancel_down_bits(htb->ch_ceil.rs_rate*8, &rubit); in htb_class_dump_details()
163 r, ru, rbit, rubit, 1<<htb->ch_ceil.rs_cell_log); in htb_class_dump_details()
|
| D | cbq.c | 101 double r, rbit; in cbq_dump_line() local
108 rbit = nl_cancel_down_bits(cbq->cbq_rate.rate * 8, &rubit); in cbq_dump_line()
111 r, ru, rbit, rubit, cbq->cbq_wrr.priority); in cbq_dump_line()
|
| D | tbf.c | 79 double r, rbit, lim; in tbf_dump_line() local
87 rbit = nl_cancel_down_bits(tbf->qt_rate.rs_rate*8, &rubit); in tbf_dump_line()
91 r, ru, rbit, rubit, lim, limu); in tbf_dump_line()
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| D | rbit.ll | 1 ; Show that we know how to translate rbit.
36 ; ASM-NEXT: rbit r0, r0
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | ctz.ll | 7 ; CHECK: rbit
|
| /external/llvm/test/MC/ARM/ |
| D | not-armv4.s | 8 rbit r4,r9 label
|
| /external/clang/test/CodeGen/ |
| D | builtins-arm64.c | 14 unsigned rbit(unsigned a) { in rbit() function
|
| D | builtins-arm.c | 73 unsigned rbit(unsigned a) { in rbit() function
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-simd-misc.s.cs | 96 0xe0,0x5b,0x60,0x6e = rbit v0.16b, v31.16b
97 0x21,0x59,0x60,0x2e = rbit v1.8b, v9.8b
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 291 rbit v0.16b, v31.16b
292 rbit v1.8b, v9.8b
|
| D | arm64-arithmetic-encoding.s | 436 rbit w1, w2
437 rbit x1, x2
|
| D | neon-diagnostics.s | 5563 rbit v2.8h, v4.8h
5564 rbit v6.4s, v8.4s
5565 rbit v6.2d, v8.2d
5566 rbit v13.4h, v21.4h
5567 rbit v4.2s, v0.2s
|
| /external/valgrind/none/tests/arm/ |
| D | v6intARM.stdout.exp | 783 rbit r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x00000000
784 rbit r0, r1 :: rd 0xffffffff rm 0xffffffff, carryin 0, cpsr 0x00000000
785 rbit r0, r1 :: rd 0x00000001 rm 0x80000000, carryin 0, cpsr 0x00000000
786 rbit r0, r1 :: rd 0x80000000 rm 0x00000001, carryin 0, cpsr 0x00000000
787 rbit r0, r1 :: rd 0xe49a828c rm 0x31415927, carryin 0, cpsr 0x00000000
788 rbit r0, r1 :: rd 0x46a82828 rm 0x14141562, carryin 0, cpsr 0x00000000
789 rbit r0, r1 :: rd 0xf89c17d5 rm 0xabe8391f, carryin 0, cpsr 0x00000000
790 rbit r0, r1 :: rd 0x01551409 rm 0x9028aa80, carryin 0, cpsr 0x00000000
791 rbit r0, r1 :: rd 0xb63f8b57 rm 0xead1fc6d, carryin 0, cpsr 0x00000000
792 rbit r0, r1 :: rd 0xaa3193ac rm 0x35c98c55, carryin 0, cpsr 0x00000000
[all …]
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| D | nacl-other-intrinsics.ll | 558 ; ARM32: rbit
583 ; ARM32: rbit
584 ; ARM32: rbit
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 400 # CHECK: rbit w1, w2
402 # CHECK: rbit x1, x2
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-t32.cc | 53 M(rbit) \
|
| D | test-assembler-cond-rd-rn-a32.cc | 53 M(rbit) \
|
| /external/valgrind/none/tests/arm64/ |
| D | integer.stdout.exp | 1810 rbit x11,x23 :: rd 112d0aa7755d9ebf rn fd79baaee550b488, cin 0, nzcv 00000000
1811 rbit x11,x23 :: rd cee842a2902a8617 rn e861540945421773, cin 0, nzcv 00000000
1812 rbit x11,x23 :: rd 36fdb8bf0b028859 rn 9a1140d0fd1dbf6c, cin 0, nzcv 00000000
1813 rbit w11,w23 :: rd 00000000112d0aa7 rn fd79baaee550b488, cin 0, nzcv 00000000
1814 rbit w11,w23 :: rd 00000000cee842a2 rn e861540945421773, cin 0, nzcv 00000000
1815 rbit w11,w23 :: rd 0000000036fdb8bf rn 9a1140d0fd1dbf6c, cin 0, nzcv 00000000
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.h | 272 void rbit(const Operand *OpRd, const Operand *OpRm, CondARM32::Cond Cond);
|