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Searched refs:rd (Results 1 – 25 of 800) sorted by relevance

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/external/fio/engines/
Drdma.c194 struct rdmaio_data *rd = td->io_ops_data; in client_recv() local
197 if (wc->byte_len != sizeof(rd->recv_buf)) { in client_recv()
203 if (max_bs > ntohl(rd->recv_buf.max_bs)) { in client_recv()
206 ntohl(rd->recv_buf.max_bs), max_bs); in client_recv()
211 if ((rd->rdma_protocol == FIO_RDMA_MEM_WRITE) || in client_recv()
212 (rd->rdma_protocol == FIO_RDMA_MEM_READ)) { in client_recv()
216 rd->rmt_nr = ntohl(rd->recv_buf.nr); in client_recv()
218 for (i = 0; i < rd->rmt_nr; i++) { in client_recv()
219 rd->rmt_us[i].buf = ntohll(rd->recv_buf.rmt_us[i].buf); in client_recv()
220 rd->rmt_us[i].rkey = ntohl(rd->recv_buf.rmt_us[i].rkey); in client_recv()
[all …]
/external/iproute2/rdma/
Dlink.c14 static int link_help(struct rd *rd) in link_help() argument
16 pr_out("Usage: %s link show [DEV/PORT_INDEX]\n", rd->filename); in link_help()
59 static void link_print_caps(struct rd *rd, struct nlattr **tb) in link_print_caps() argument
69 if (rd->json_output) { in link_print_caps()
70 jsonw_name(rd->jw, "caps"); in link_print_caps()
71 jsonw_start_array(rd->jw); in link_print_caps()
77 if (rd->json_output) { in link_print_caps()
78 jsonw_string(rd->jw, caps_to_str(idx)); in link_print_caps()
88 if (rd->json_output) in link_print_caps()
89 jsonw_end_array(rd->jw); in link_print_caps()
[all …]
Dutils.c14 static int rd_argc(struct rd *rd) in rd_argc() argument
16 return rd->argc; in rd_argc()
19 char *rd_argv(struct rd *rd) in rd_argv() argument
21 if (!rd_argc(rd)) in rd_argv()
23 return *rd->argv; in rd_argv()
33 static bool rd_argv_match(struct rd *rd, const char *pattern) in rd_argv_match() argument
35 if (!rd_argc(rd)) in rd_argv_match()
37 return strcmpx(rd_argv(rd), pattern) == 0; in rd_argv_match()
40 void rd_arg_inc(struct rd *rd) in rd_arg_inc() argument
42 if (!rd_argc(rd)) in rd_arg_inc()
[all …]
Ddev.c14 static int dev_help(struct rd *rd) in dev_help() argument
16 pr_out("Usage: %s dev show [DEV]\n", rd->filename); in dev_help()
69 static void dev_print_caps(struct rd *rd, struct nlattr **tb) in dev_print_caps() argument
79 if (rd->json_output) { in dev_print_caps()
80 jsonw_name(rd->jw, "caps"); in dev_print_caps()
81 jsonw_start_array(rd->jw); in dev_print_caps()
87 if (rd->json_output) { in dev_print_caps()
88 jsonw_string(rd->jw, dev_caps_to_str(idx)); in dev_print_caps()
98 if (rd->json_output) in dev_print_caps()
99 jsonw_end_array(rd->jw); in dev_print_caps()
[all …]
Drdma.c22 static int cmd_help(struct rd *rd) in cmd_help() argument
24 help(rd->filename); in cmd_help()
28 static int rd_cmd(struct rd *rd) in rd_cmd() argument
38 return rd_exec_cmd(rd, cmds, "object"); in rd_cmd()
41 static int rd_init(struct rd *rd, int argc, char **argv, char *filename) in rd_init() argument
46 rd->filename = filename; in rd_init()
47 rd->argc = argc; in rd_init()
48 rd->argv = argv; in rd_init()
49 INIT_LIST_HEAD(&rd->dev_map_list); in rd_init()
51 if (rd->json_output) { in rd_init()
[all …]
Drdma.h39 struct rd { struct
57 int (*func)(struct rd *rd); argument
63 bool rd_no_arg(struct rd *rd);
64 void rd_arg_inc(struct rd *rd);
66 char *rd_argv(struct rd *rd);
67 uint32_t get_port_from_argv(struct rd *rd);
72 int cmd_dev(struct rd *rd);
73 int cmd_link(struct rd *rd);
74 int rd_exec_cmd(struct rd *rd, const struct rd_cmd *c, const char *str);
79 void rd_free_devmap(struct rd *rd);
[all …]
/external/valgrind/none/tests/mips64/
Dcvm_atomic.stdout.exp-LE1 baddu $t3, $t1, $t2 :: rd 0x4, rs 0x42b0c0a28677b502, rt 0x42b0c0a28677b502
2 baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x42b0c0a28677b502, rt 0x9e705cc51ad8dca0
3 baddu $t3, $t1, $t2 :: rd 0x82, rs 0x42b0c0a28677b502, rt 0x47f505569a08a180
4 baddu $t3, $t1, $t2 :: rd 0x99, rs 0x42b0c0a28677b502, rt 0x94ff52fc81afa797
5 baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x42b0c0a28677b502, rt 0x556b3ecaccf17ac5
6 baddu $t3, $t1, $t2 :: rd 0x68, rs 0x42b0c0a28677b502, rt 0x3c2cd9a9cda20766
7 baddu $t3, $t1, $t2 :: rd 0x38, rs 0x42b0c0a28677b502, rt 0xd0d070db710cd036
8 baddu $t3, $t1, $t2 :: rd 0xa9, rs 0x42b0c0a28677b502, rt 0x2f39454412d6e4a7
9 baddu $t3, $t1, $t2 :: rd 0x16, rs 0x42b0c0a28677b502, rt 0xed5005cbc8b0a214
10 baddu $t3, $t1, $t2 :: rd 0x42, rs 0x42b0c0a28677b502, rt 0x87750a04ad765040
[all …]
Dcvm_atomic.stdout.exp-BE1 baddu $t3, $t1, $t2 :: rd 0x4, rs 0x42b0c0a28677b502, rt 0x42b0c0a28677b502
2 baddu $t3, $t1, $t2 :: rd 0xa2, rs 0x42b0c0a28677b502, rt 0x9e705cc51ad8dca0
3 baddu $t3, $t1, $t2 :: rd 0x82, rs 0x42b0c0a28677b502, rt 0x47f505569a08a180
4 baddu $t3, $t1, $t2 :: rd 0x99, rs 0x42b0c0a28677b502, rt 0x94ff52fc81afa797
5 baddu $t3, $t1, $t2 :: rd 0xc7, rs 0x42b0c0a28677b502, rt 0x556b3ecaccf17ac5
6 baddu $t3, $t1, $t2 :: rd 0x68, rs 0x42b0c0a28677b502, rt 0x3c2cd9a9cda20766
7 baddu $t3, $t1, $t2 :: rd 0x38, rs 0x42b0c0a28677b502, rt 0xd0d070db710cd036
8 baddu $t3, $t1, $t2 :: rd 0xa9, rs 0x42b0c0a28677b502, rt 0x2f39454412d6e4a7
9 baddu $t3, $t1, $t2 :: rd 0x16, rs 0x42b0c0a28677b502, rt 0xed5005cbc8b0a214
10 baddu $t3, $t1, $t2 :: rd 0x42, rs 0x42b0c0a28677b502, rt 0x87750a04ad765040
[all …]
Dcvm_ins.stdout.exp514 sne $t1, $t2 ,$t3 :: rd 0x0 rs 0x0, rt 0x0
515 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x130476dc
516 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x2608edb8
517 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x350c9b64
518 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x4c11db70
519 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x5f15adac
520 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x6a1936c8
521 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x791d4014
522 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x9823b6e0
523 sne $t1, $t2 ,$t3 :: rd 0x1 rs 0x0, rt 0x8b27c03c
[all …]
/external/vixl/src/aarch32/
Dassembler-aarch32.h246 Register rd,
250 Register rd,
252 typedef void (Assembler::*InstructionROp)(Register rd,
255 Register rd,
260 Register rd,
266 Register rd,
270 Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width);
278 Register rd,
285 Register rd,
322 Condition cond, Register rd, Register rn, Register rm, Register ra);
[all …]
Dmacro-assembler-aarch32.h552 void Adr(Condition cond, Register rd, RawLiteral* literal) { in Adr() argument
553 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); in Adr()
560 bool can_encode = adr_info(cond, Best, rd, literal, &info); in Adr()
568 adr(cond, Best, rd, literal); in Adr()
571 void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); } in Adr() argument
704 void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) { in Vldr() argument
705 VIXL_ASSERT(!AliasesAvailableScratchRegister(rd)); in Vldr()
712 bool can_encode = vldr_info(cond, dt, rd, literal, &info); in Vldr()
720 vldr(cond, dt, rd, literal); in Vldr()
723 void Vldr(DataType dt, DRegister rd, RawLiteral* literal) { in Vldr() argument
[all …]
Ddisasm-aarch32.h611 Register rd,
617 Register rd,
623 Register rd,
627 void add(Condition cond, Register rd, const Operand& operand);
631 Register rd,
635 void adds(Register rd, const Operand& operand);
637 void addw(Condition cond, Register rd, Register rn, const Operand& operand);
639 void adr(Condition cond, EncodingSize size, Register rd, Location* location);
643 Register rd,
649 Register rd,
[all …]
Ddisasm-aarch32.cc1118 Register rd, in adc() argument
1124 if (!rd.Is(rn) || !use_short_hand_form_) { in adc()
1125 os() << rd << ", "; in adc()
1132 Register rd, in adcs() argument
1138 if (!rd.Is(rn) || !use_short_hand_form_) { in adcs()
1139 os() << rd << ", "; in adcs()
1146 Register rd, in add() argument
1152 if (!rd.Is(rn) || !use_short_hand_form_) { in add()
1153 os() << rd << ", "; in add()
1158 void Disassembler::add(Condition cond, Register rd, const Operand& operand) { in add() argument
[all …]
Dassembler-aarch32.cc1910 Register rd, in adc() argument
1921 ((!rd.IsPC() && !rn.IsPC()) || AllowUnpredictable())) { in adc()
1922 EmitT32_32(0xf1400000U | (rd.GetCode() << 8) | (rn.GetCode() << 16) | in adc()
1934 (rd.GetCode() << 12) | (rn.GetCode() << 16) | in adc()
1945 if (InITBlock() && !size.IsWide() && rd.Is(rn) && rn.IsLow() && in adc()
1947 EmitT32_16(0x4140 | rd.GetCode() | (rm.GetCode() << 3)); in adc()
1958 ((!rd.IsPC() && !rn.IsPC() && !rm.IsPC()) || AllowUnpredictable())) { in adc()
1960 EmitT32_32(0xeb400000U | (rd.GetCode() << 8) | (rn.GetCode() << 16) | in adc()
1971 (rd.GetCode() << 12) | (rn.GetCode() << 16) | rm.GetCode() | in adc()
1984 ((!rd.IsPC() && !rn.IsPC() && !rm.IsPC() && !rs.IsPC()) || in adc()
[all …]
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h46 void MacroAssembler::And(const Register& rd, in And() argument
50 DCHECK(!rd.IsZero()); in And()
51 LogicalMacro(rd, rn, operand, AND); in And()
55 void MacroAssembler::Ands(const Register& rd, in Ands() argument
59 DCHECK(!rd.IsZero()); in Ands()
60 LogicalMacro(rd, rn, operand, ANDS); in Ands()
71 void MacroAssembler::Bic(const Register& rd, in Bic() argument
75 DCHECK(!rd.IsZero()); in Bic()
76 LogicalMacro(rd, rn, operand, BIC); in Bic()
80 void MacroAssembler::Bics(const Register& rd, in Bics() argument
[all …]
Dassembler-arm64.cc1082 void Assembler::adr(const Register& rd, int imm21) { in adr() argument
1083 DCHECK(rd.Is64Bits()); in adr()
1084 Emit(ADR | ImmPCRelAddress(imm21) | Rd(rd)); in adr()
1088 void Assembler::adr(const Register& rd, Label* label) { in adr() argument
1089 adr(rd, LinkAndGetByteOffsetTo(label)); in adr()
1093 void Assembler::add(const Register& rd, in add() argument
1096 AddSub(rd, rn, operand, LeaveFlags, ADD); in add()
1100 void Assembler::adds(const Register& rd, in adds() argument
1103 AddSub(rd, rn, operand, SetFlags, ADD); in adds()
1114 void Assembler::sub(const Register& rd, in sub() argument
[all …]
/external/llvm/lib/Target/Sparc/
DSparcInstrAliases.td15 // mov<cond> <ccreg> rs2, rd
20 // mov<cond> (%icc|%xcc), rs2, rd
22 ", $rs2, $rd"),
23 (movrr IntRegs:$rd, IntRegs:$rs2, condVal)>;
25 // mov<cond> (%icc|%xcc), simm11, rd
27 ", $simm11, $rd"),
28 (movri IntRegs:$rd, i32imm:$simm11, condVal)>;
30 // fmovs<cond> (%icc|%xcc), $rs2, $rd
32 ", $rs2, $rd"),
33 (fmovs FPRegs:$rd, FPRegs:$rs2, condVal)>;
[all …]
/external/valgrind/none/tests/mips32/
DMIPS32int.stdout.exp-mips32-BE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32-LE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
DMIPS32int.stdout.exp-mips32r2-LE2 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
3 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000000, rt 0x00000001
4 add $t0, $t1, $t2 :: rd 0x00000001 rs 0x00000001, rt 0x00000000
5 add $t0, $t1, $t2 :: rd 0x00000002 rs 0x00000001, rt 0x00000001
6 add $t0, $t1, $t2 :: rd 0xffffffff rs 0x00000000, rt 0xffffffff
7 add $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000001, rt 0xffffffff
8 add $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000000
9 add $t0, $t1, $t2 :: rd 0x5859704f rs 0x31415927, rt 0x27181728
10 add $t0, $t1, $t2 :: rd 0xc859704f rs 0x31415927, rt 0x97181728
11 add $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
[all …]
/external/valgrind/none/tests/arm/
Dv6media.stdout.exp2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[…
3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[…
4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[…
5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[…
6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[…
7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[…
9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x…
10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x…
11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x…
12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x…
[all …]
Dv6intARM.stdout.exp2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z
8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N
11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C
12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC
13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C
17 mvn r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x00000000
18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N
[all …]
/external/valgrind/none/tests/arm64/
Dcrc32.stdout.exp2 crc32b w21,w20,w19 :: rd 00000000f8957d4c rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 000…
3 crc32b w21,w20,w19 :: rd 00000000f810b326 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 000…
4 crc32b w21,w20,w19 :: rd 00000000ef405c96 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 000…
5 crc32b w21,w20,w19 :: rd 00000000a0db523c rm fbb5c64ed1b044c6, rn 33ca4c4fb3960326, cin 0, nzcv 000…
6 crc32b w21,w20,w19 :: rd 0000000096de687b rm 2b7c5939d7c0f528, rn b73870a5a6630162, cin 0, nzcv 000…
7 crc32b w21,w20,w19 :: rd 000000005b546bd0 rm 02fe41918ac5cdba, rn 48e0815289728f05, cin 0, nzcv 000…
8 crc32b w21,w20,w19 :: rd 000000008f7a8684 rm b60a8f381f187bae, rn 008c208cc413ff72, cin 0, nzcv 000…
9 crc32h w21,w20,w19 :: rd 00000000862b47a9 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 000…
10 crc32h w21,w20,w19 :: rd 000000009a47a305 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 000…
11 crc32h w21,w20,w19 :: rd 00000000a788663d rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 000…
[all …]
Dinteger.stdout.exp2 add x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000…
3 add w3, w4, w5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000…
4 adc x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 0000000…
5 adc x3, x4, x5 :: rd 0000000000004abf rm 0000000000003039, rn 0000000000001a85, cin 1, nzcv 2000000…
6 adc x3, x4, x5 :: rd ffffffffffffffff rm 0000000000000000, rn ffffffffffffffff, cin 0, nzcv 0000000…
7 adc x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn ffffffffffffffff, cin 1, nzcv 2000000…
8 adc x3, x4, x5 :: rd 5859704f00000000 rm 3141592700000000, rn 2718172800000000, cin 0, nzcv 0000000…
9 adc x3, x4, x5 :: rd 5859704f00000001 rm 3141592700000000, rn 2718172800000000, cin 1, nzcv 2000000…
10 adc x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn 0000000000000000, cin 0, nzcv 0000000…
11 adc x3, x4, x5 :: rd 0000000000000001 rm 0000000000000000, rn 0000000000000000, cin 1, nzcv 2000000…
[all …]
/external/python/cpython3/Lib/test/
Dtest_selectors.py53 rd, wr = socketpair()
54 self.addCleanup(rd.close)
56 return rd, wr
62 rd, wr = self.make_socketpair()
64 key = s.register(rd, selectors.EVENT_READ, "data")
66 self.assertEqual(key.fileobj, rd)
67 self.assertEqual(key.fd, rd.fileno())
78 self.assertRaises(KeyError, s.register, rd, selectors.EVENT_READ)
81 self.assertRaises(KeyError, s.register, rd.fileno(),
88 rd, wr = self.make_socketpair()
[all …]

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