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Searched refs:res1 (Results 1 – 25 of 178) sorted by relevance

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/external/llvm/test/Bitcode/
DconversionInstructions.3.2.ll9 ; CHECK: %res1 = trunc i32 %src to i8
10 %res1 = trunc i32 %src to i8
17 ; CHECK: %res1 = zext i32 %src to i64
18 %res1 = zext i32 %src to i64
25 ; CHECK: %res1 = sext i32 %src to i64
26 %res1 = sext i32 %src to i64
33 ; CHECK: %res1 = fptrunc double %src to float
34 %res1 = fptrunc double %src to float
41 ; CHECK: %res1 = fpext float %src to double
42 %res1 = fpext float %src to double
[all …]
DbitwiseInstructions.3.2.ll10 ; CHECK: %res1 = shl i8 %x1, %x1
11 %res1 = shl i8 %x1, %x1
27 ; CHECK: %res1 = lshr i8 %x1, %x1
28 %res1 = lshr i8 %x1, %x1
38 ; CHECK: %res1 = ashr i8 %x1, %x1
39 %res1 = ashr i8 %x1, %x1
49 ; CHECK: %res1 = and i8 %x1, %x1
50 %res1 = and i8 %x1, %x1
57 ; CHECK: %res1 = or i8 %x1, %x1
58 %res1 = or i8 %x1, %x1
[all …]
DbinaryIntInstructions.3.2.ll10 ; CHECK: %res1 = add i1 %x1, %x1
11 %res1 = add i1 %x1, %x1
39 ; CHECK: %res1 = add nuw nsw <2 x i8> %x1, %x1
40 %res1 = add nuw nsw <2 x i8> %x1, %x1
59 ; CHECK: %res1 = add nuw nsw <2 x i16> %x1, %x1
60 %res1 = add nuw nsw <2 x i16> %x1, %x1
79 ; CHECK: %res1 = add nuw nsw <2 x i32> %x1, %x1
80 %res1 = add nuw nsw <2 x i32> %x1, %x1
99 ; CHECK: %res1 = add nuw nsw <2 x i64> %x1, %x1
100 %res1 = add nuw nsw <2 x i64> %x1, %x1
[all …]
DbinaryFloatInstructions.3.2.ll10 ; CHECK: %res1 = fadd float %x1, %x1
11 %res1 = fadd float %x1, %x1
33 ; CHECK: %res1 = fadd <2 x float> %x1, %x1
34 %res1 = fadd <2 x float> %x1, %x1
53 ; CHECK: %res1 = fadd <2 x double> %x1, %x1
54 %res1 = fadd <2 x double> %x1, %x1
73 ; CHECK: %res1 = fadd <2 x half> %x1, %x1
74 %res1 = fadd <2 x half> %x1, %x1
93 ; CHECK: %res1 = fsub float %x1, %x1
94 %res1 = fsub float %x1, %x1
[all …]
DvectorInstructions.3.2.ll10 ; CHECK: %res1 = extractelement <2 x i8> %x1, i32 0
11 %res1 = extractelement <2 x i8> %x1, i32 0
18 ; CHECK: %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
19 %res1 = insertelement <2 x i8> %x1, i8 0, i32 0
26 ; CHECK: %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
27 %res1 = shufflevector <2 x i8> %x1, <2 x i8> %x1, <2 x i32> <i32 0, i32 1>
/external/icu/icu4c/source/test/intltest/
Dtchcfmt.cpp51 UnicodeString res1, res2; in TestSimpleExample() local
62 res1 = form->format(i, str, fpos, status ); in TestSimpleExample()
69 … it_logln(UnicodeString("") + ix + UnicodeString(" -> ") + res1 + UnicodeString(" -> ") + res2); in TestSimpleExample()
174 UnicodeString res1, res2; in TestComplexExample() local
175 pattform->toPattern( res1 ); in TestComplexExample()
176 it_logln("MessageFormat toPattern: " + res1); in TestComplexExample()
177 fileform->toPattern( res1 ); in TestComplexExample()
178 it_logln("ChoiceFormat toPattern: " + res1); in TestComplexExample()
179 if (res1 == "-1#are corrupted files|0#are no files|1#is one file|2#are {2} files") { in TestComplexExample()
349 form_pat.toPattern( res1 ); in TestComplexExample()
[all …]
/external/libvpx/libvpx/vp8/common/mips/msa/
Didct_msa.c91 v4i32 res0, res1, res2, res3; in idct4x4_addblk_msa() local
104 ILVR_B4_SW(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1, in idct4x4_addblk_msa()
106 ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2, in idct4x4_addblk_msa()
108 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in idct4x4_addblk_msa()
110 res1 = CLIP_SW_0_255(res1); in idct4x4_addblk_msa()
113 PCKEV_B2_SW(res0, res1, res2, res3, vt0, vt1); in idct4x4_addblk_msa()
121 v8i16 vec, res0, res1, res2, res3, dst0, dst1; in idct4x4_addconst_msa() local
128 ILVR_B4_SH(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1, in idct4x4_addconst_msa()
130 ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3); in idct4x4_addconst_msa()
131 CLIP_SH4_0_255(res0, res1, res2, res3); in idct4x4_addconst_msa()
[all …]
/external/ltp/testcases/kernel/syscalls/getcwd/
Dgetcwd03.c47 char *res1 = NULL; in verify_getcwd() local
52 res1 = getcwd(NULL, 0); in verify_getcwd()
53 if (!res1) { in verify_getcwd()
69 if (strcmp(res1, res2)) { in verify_getcwd()
72 res1, res2); in verify_getcwd()
79 if (strcmp(link, SAFE_BASENAME(res1))) { in verify_getcwd()
88 free(res1); in verify_getcwd()
/external/llvm/test/CodeGen/X86/
Davx512bwvl-intrinsics-fast-isel.ll19 %res1 = bitcast <16 x i8> %res0 to <2 x i64>
20 ret <2 x i64> %res1
40 %res1 = select <16 x i1> %arg1, <16 x i8> %res0, <16 x i8> %arg0
41 %res2 = bitcast <16 x i8> %res1 to <2 x i64>
61 %res1 = select <16 x i1> %arg0, <16 x i8> %res0, <16 x i8> zeroinitializer
62 %res2 = bitcast <16 x i8> %res1 to <2 x i64>
78 %res1 = bitcast <32 x i8> %res0 to <4 x i64>
79 ret <4 x i64> %res1
99 %res1 = select <32 x i1> %arg1, <32 x i8> %res0, <32 x i8> %arg0
100 %res2 = bitcast <32 x i8> %res1 to <4 x i64>
[all …]
Davx512dq-intrinsics.ll15 …%res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtpd2qq.512(<8 x double> %x0, <8 x i64> %x1, i8 -1, …
16 %res2 = add <8 x i64> %res, %res1
31 …%res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtpd2uqq.512(<8 x double> %x0, <8 x i64> %x1, i8 -1,…
32 %res2 = add <8 x i64> %res, %res1
47 …%res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtps2qq.512(<8 x float> %x0, <8 x i64> %x1, i8 -1, i…
48 %res2 = add <8 x i64> %res, %res1
63 …%res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtps2uqq.512(<8 x float> %x0, <8 x i64> %x1, i8 -1, …
64 %res2 = add <8 x i64> %res, %res1
79 …%res1 = call <8 x double> @llvm.x86.avx512.mask.cvtqq2pd.512(<8 x i64> %x0, <8 x double> %x1, i8 -…
80 %res2 = fadd <8 x double> %res, %res1
[all …]
Davx512-intrinsics-fast-isel.ll19 %res1 = bitcast <16 x i32> %res0 to <8 x i64>
20 ret <8 x i64> %res1
40 %res1 = select <16 x i1> %arg1, <16 x i32> %res0, <16 x i32> %arg0
41 %res2 = bitcast <16 x i32> %res1 to <8 x i64>
61 %res1 = select <16 x i1> %arg0, <16 x i32> %res0, <16 x i32> zeroinitializer
62 %res2 = bitcast <16 x i32> %res1 to <8 x i64>
95 %res1 = select <8 x i1> %arg1, <8 x i64> %res0, <8 x i64> %a0
96 ret <8 x i64> %res1
114 %res1 = select <8 x i1> %arg0, <8 x i64> %res0, <8 x i64> zeroinitializer
115 ret <8 x i64> %res1
[all …]
Davx512vl-intrinsics-fast-isel.ll19 %res1 = bitcast <4 x i32> %res0 to <2 x i64>
20 ret <2 x i64> %res1
51 %res1 = select <4 x i1> %arg1, <4 x i32> %res0, <4 x i32> %arg0
52 %res2 = bitcast <4 x i32> %res1 to <2 x i64>
83 %res1 = select <4 x i1> %arg0, <4 x i32> %res0, <4 x i32> zeroinitializer
84 %res2 = bitcast <4 x i32> %res1 to <2 x i64>
100 %res1 = bitcast <8 x i32> %res0 to <4 x i64>
101 ret <4 x i64> %res1
121 %res1 = select <8 x i1> %arg1, <8 x i32> %res0, <8 x i32> %arg0
122 %res2 = bitcast <8 x i32> %res1 to <4 x i64>
[all …]
Davx512cdvl-intrinsics.ll19 %res1 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 -1)
21 %res2 = add <4 x i32> %res, %res1
37 %res1 = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 -1)
38 %res2 = add <8 x i32> %res, %res1
53 %res1 = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 -1)
54 %res2 = add <2 x i64> %res, %res1
69 %res1 = call <4 x i64> @llvm.x86.avx512.mask.lzcnt.q.256(<4 x i64> %x0, <4 x i64> %x1, i8 -1)
70 %res2 = add <4 x i64> %res, %res1
87 %res1 = call <4 x i32> @llvm.x86.avx512.mask.conflict.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 -1)
89 %res2 = add <4 x i32> %res, %res1
[all …]
Dmerge-consecutive-loads-128.ll32 %res1 = insertelement <2 x double> %res0, double %val1, i32 1
33 ret <2 x double> %res1
57 %res1 = insertelement <2 x i64> %res0, i64 %val1, i32 1
58 ret <2 x i64> %res1
86 %res1 = insertelement <4 x float> %res0, float %val1, i32 1
87 %res2 = insertelement <4 x float> %res1, float %val2, i32 2
111 %res1 = insertelement <4 x float> %res0, float 0.0, i32 1
112 ret <4 x float> %res1
136 %res1 = insertelement <4 x float> %res0, float %val1, i32 1
137 ret <4 x float> %res1
[all …]
Dvector-shuffle-combining-xop.ll19 …%res1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %res0, <2 x double> undef, <2 x i6…
20 ret <2 x double> %res1
29 …%res1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %res0, <4 x double> undef, <4 …
30 ret <4 x double> %res1
39 …%res1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %res0, <4 x float> undef, <4 x i32> …
40 ret <4 x float> %res1
49 …%res1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %res0, <8 x float> undef, <8 x i…
50 ret <8 x float> %res1
78 …%res1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %res0, <16 x i8> undef, <16 x i8> <i8 15, i8…
79 ret <16 x i8> %res1
[all …]
/external/valgrind/memcheck/tests/
Dbuflen_check.c8 int res1, res2, res3; in main() local
11 res1 = socket(PF_UNIX, SOCK_STREAM, 0); in main()
12 if (res1 == 0) { in main()
18 res2 = getsockname(res1, NULL, &len); /* NULL is bogus */ in main()
19 res3 = getsockname(res1, &name, NULL); /* NULL is bogus */ in main()
/external/libvpx/libvpx/vpx_dsp/x86/
Dhighbd_convolve_avx2.c341 __m256i signal[8], res0, res1; in vpx_highbd_filter_block1d8_h8_avx2() local
351 filter_8x1_pixels(&signal[4], ff, &res1); in vpx_highbd_filter_block1d8_h8_avx2()
352 store_8x2_pixels(&res0, &res1, &max, dst_ptr, dst_pitch); in vpx_highbd_filter_block1d8_h8_avx2()
368 __m256i signal[8], res0, res1; in vpx_highbd_filter_block1d16_h8_avx2() local
378 filter_8x1_pixels(&signal[4], ff, &res1); in vpx_highbd_filter_block1d16_h8_avx2()
379 store_16x1_pixels(&res0, &res1, &max, dst_ptr); in vpx_highbd_filter_block1d16_h8_avx2()
461 __m256i signal[2], res0, res1; in vpx_highbd_filter_block1d8_h2_avx2() local
470 filter_16_2t_pixels(signal, &ff, &res0, &res1); in vpx_highbd_filter_block1d8_h2_avx2()
471 store_8x2_pixels(&res0, &res1, &max, dst_ptr, dst_pitch); in vpx_highbd_filter_block1d8_h2_avx2()
487 __m256i signal[2], res0, res1; in vpx_highbd_filter_block1d16_h2_avx2() local
[all …]
Dfwd_txfm_sse2.h70 int res0, res1; in check_epi16_overflow_x8() local
72 res1 = check_epi16_overflow_x4(preg4, preg5, preg6, preg7); in check_epi16_overflow_x8()
73 return res0 + res1; in check_epi16_overflow_x8()
81 int res0, res1; in check_epi16_overflow_x12() local
83 res1 = check_epi16_overflow_x4(preg4, preg5, preg6, preg7); in check_epi16_overflow_x12()
85 return res0 + res1; in check_epi16_overflow_x12()
95 int res0, res1; in check_epi16_overflow_x16() local
97 res1 = check_epi16_overflow_x4(preg4, preg5, preg6, preg7); in check_epi16_overflow_x16()
100 if (!res1) res1 = check_epi16_overflow_x4(preg12, preg13, preg14, preg15); in check_epi16_overflow_x16()
102 return res0 + res1; in check_epi16_overflow_x16()
[all …]
/external/llvm/test/Transforms/ConstantHoisting/ARM/
Dbad-cases.ll53 ; CHECK: %res1 = sdiv i32 %l1, 1000000000
59 %l1 = phi i32 [%res1, %loop], [%in1, %entry]
61 %res1 = sdiv i32 %l1, 1000000000
62 store volatile i32 %res1, i32* %addr
65 %again = icmp eq i32 %res1, %res2
74 ; CHECK: %res1 = udiv i32 %l1, 1000000000
81 %l1 = phi i32 [%res1, %loop], [%in1, %entry]
83 %res1 = udiv i32 %l1, 1000000000
84 store volatile i32 %res1, i32* %addr
87 %again = icmp eq i32 %res1, %res2
/external/llvm/test/CodeGen/SystemZ/
Dasm-18.ll161 %res1 = extractvalue { i32, i32 } %res, 0
163 %trunc1 = trunc i32 %res1 to i8
184 %res1 = extractvalue { i32, i32 } %res, 0
186 %trunc1 = trunc i32 %res1 to i16
329 %res1 = call i32 asm "stepa $0", "=h"()
330 %and1 = and i32 %res1, 65535
348 %res1 = call i32 asm "stepa $0", "=r"()
349 %and1 = and i32 %res1, 65535
369 %res1 = call i32 asm "stepa $0", "=h"()
370 %or1 = or i32 %res1, 305397760
[all …]
/external/valgrind/none/tests/amd64/
Dbmi.c57 void do_mulx64 ( /*OUT*/ULong* res1, /*OUT*/ULong* res2, in do_mulx64() argument
77 *res1 = tem1; in do_mulx64()
91 if (*res1 != tem1 || *res2 != tem2) in do_mulx64()
98 void do_mulx32 ( /*OUT*/ULong* res1, /*OUT*/ULong* res2, in do_mulx32() argument
118 *res1 = tem1; in do_mulx32()
132 if (*res1 != tem1 || *res2 != tem2) in do_mulx32()
377 void do_rorx64 ( /*OUT*/ULong* res1, /*OUT*/ULong* res2, ULong arg ) in do_rorx64() argument
393 *res1 = tem; in do_rorx64()
413 void do_rorx32 ( /*OUT*/ULong* res1, /*OUT*/ULong* res2, UInt arg ) in do_rorx32() argument
429 *res1 = tem; in do_rorx32()
[all …]
/external/llvm/test/CodeGen/ARM/
Dintrinsics-crypto.ll23 %res1 = insertelement <4 x i32> undef, i32 %resscalar, i32 0
25 %res2 = call <4 x i32> @llvm.arm.neon.sha1c(<4 x i32> %tmp2, i32 %scalar, <4 x i32> %res1)
27 %res3 = call <4 x i32> @llvm.arm.neon.sha1m(<4 x i32> %res2, i32 %scalar, <4 x i32> %res1)
29 %res4 = call <4 x i32> @llvm.arm.neon.sha1p(<4 x i32> %res3, i32 %scalar, <4 x i32> %res1)
31 %res5 = call <4 x i32> @llvm.arm.neon.sha1su0(<4 x i32> %res4, <4 x i32> %tmp3, <4 x i32> %res1)
33 %res6 = call <4 x i32> @llvm.arm.neon.sha1su1(<4 x i32> %res5, <4 x i32> %res1)
35 %res7 = call <4 x i32> @llvm.arm.neon.sha256h(<4 x i32> %res6, <4 x i32> %tmp3, <4 x i32> %res1)
37 %res8 = call <4 x i32> @llvm.arm.neon.sha256h2(<4 x i32> %res7, <4 x i32> %tmp3, <4 x i32> %res1)
39 %res9 = call <4 x i32> @llvm.arm.neon.sha256su1(<4 x i32> %res8, <4 x i32> %tmp3, <4 x i32> %res1)
/external/valgrind/none/tests/x86/
Dfxtract.c5 double arg, res1, res2; variable
13 "\tfstpl " VG_SYM(res1) "\n"
21 res1 = res2 = 0.0; in try()
23 printf("%17.10e -> %14.10f %14.10f\n", arg, res1, res2); in try()
/external/eigen/unsupported/test/
Dautodiff_scalar.cpp50 AD res1 = tanh(val); in check_hyperbolic_functions() local
51 VERIFY_IS_APPROX(res1.value(), std::tanh(p.x())); in check_hyperbolic_functions()
52 VERIFY_IS_APPROX(res1.derivatives().x(), Scalar(1.0) / (cosh_px * cosh_px)); in check_hyperbolic_functions()
65 res1 = tanh(val); in check_hyperbolic_functions()
66 VERIFY_IS_APPROX(res1.derivatives().x(), Scalar(0.896629559604914)); in check_hyperbolic_functions()
/external/swiftshader/third_party/subzero/crosstest/
Dtest_vector_ops_ll.ll12 %res1 = insertelement <4 x float> %vec, float %elt, i32 1
13 ret <4 x float> %res1
39 %res1 = zext <4 x i1> %res1_i1 to <4 x i32>
40 ret <4 x i32> %res1
72 %res1 = zext <8 x i1> %res1_i1 to <8 x i16>
73 ret <8 x i16> %res1
129 %res1 = zext <16 x i1> %res1_i1 to <16 x i8>
130 ret <16 x i8> %res1
204 %res1 = insertelement <4 x i32> %vec, i32 %elt, i32 1
205 ret <4 x i32> %res1
[all …]

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