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Searched refs:res9 (Results 1 – 11 of 11) sorted by relevance

/external/libyuv/files/source/
Drotate_msa.cc86 v16u8 res0, res1, res2, res3, res4, res5, res6, res7, res8, res9; in TransposeWx16_MSA() local
133 res9 = (v16u8)__msa_ilvl_w((v4i32)reg4, (v4i32)reg0); in TransposeWx16_MSA()
134 ILVRL_D(res0, res8, res1, res9, dst0, dst1, dst2, dst3); in TransposeWx16_MSA()
138 res9 = (v16u8)__msa_ilvl_w((v4i32)reg5, (v4i32)reg1); in TransposeWx16_MSA()
139 ILVRL_D(res2, res8, res3, res9, dst0, dst1, dst2, dst3); in TransposeWx16_MSA()
143 res9 = (v16u8)__msa_ilvl_w((v4i32)reg6, (v4i32)reg2); in TransposeWx16_MSA()
144 ILVRL_D(res4, res8, res5, res9, dst0, dst1, dst2, dst3); in TransposeWx16_MSA()
148 res9 = (v16u8)__msa_ilvl_w((v4i32)reg7, (v4i32)reg3); in TransposeWx16_MSA()
149 ILVRL_D(res6, res8, res7, res9, dst0, dst1, dst2, dst3); in TransposeWx16_MSA()
167 v16u8 res0, res1, res2, res3, res4, res5, res6, res7, res8, res9; in TransposeUVWx16_MSA() local
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/external/libvpx/libvpx/vpx_dsp/mips/
Didct16x16_msa.c331 v8i16 res8, res9, res10, res11, res12, res13, res14, res15; in vpx_iadst16_1d_columns_addblk_msa() local
404 ILVR_B2_SH(zero, dst8, zero, dst9, res8, res9); in vpx_iadst16_1d_columns_addblk_msa()
405 ADD2(res8, out8, res9, out9, res8, res9); in vpx_iadst16_1d_columns_addblk_msa()
406 CLIP_SH2_0_255(res8, res9); in vpx_iadst16_1d_columns_addblk_msa()
407 PCKEV_B2_SH(res8, res8, res9, res9, res8, res9); in vpx_iadst16_1d_columns_addblk_msa()
409 ST8x1_UB(res9, dst + 14 * dst_stride); in vpx_iadst16_1d_columns_addblk_msa()
/external/llvm/test/Bitcode/
DmiscInstructions.3.2.ll99 ; CHECK-NEXT: %res9 = icmp slt i32 %x1, %x2
100 %res9 = icmp slt i32 %x1, %x2
141 ; CHECK-NEXT: %res9 = fcmp olt float %x1, %x2
142 %res9 = fcmp olt float %x1, %x2
DmemInstructions.3.2.ll54 ; CHECK-NEXT: %res9 = load i8, i8* %ptr1, !invariant.load !1
55 %res9 = load i8, i8* %ptr1, !invariant.load !1
110 ; CHECK-NEXT: %res9 = load atomic i8, i8* %ptr1 singlethread unordered, align 1
111 %res9 = load atomic i8, i8* %ptr1 singlethread unordered, align 1
262 ; CHECK-NEXT: %res9 = extractvalue { i32, i1 } [[TMP]], 0
263 %res9 = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
/external/swiftshader/third_party/subzero/crosstest/
Dtest_vector_ops_ll.ll161 %res9 = zext <16 x i1> %res9_i1 to <16 x i8>
162 ret <16 x i8> %res9
318 %res9 = insertelement <16 x i8> %vec, i8 %elt, i32 9
319 ret <16 x i8> %res9
505 %res9 = zext i1 %res9_i1 to i64
506 ret i64 %res9
681 %res9 = zext i8 %res9_i8 to i64
682 ret i64 %res9
/external/llvm/test/CodeGen/ARM/
Dintrinsics-crypto.ll39 %res9 = call <4 x i32> @llvm.arm.neon.sha256su1(<4 x i32> %res8, <4 x i32> %tmp3, <4 x i32> %res1)
41 %res10 = call <4 x i32> @llvm.arm.neon.sha256su0(<4 x i32> %res9, <4 x i32> %tmp3)
/external/clang/test/SemaCXX/
Daltivec.cpp28 int res9[vec_step(vbi) == 4 ? 1 : -1]; in test_vec_step() local
/external/clang/test/SemaOpenCL/
Dvec_step.cl24 int res9[vec_step(int4) == 4 ? 1 : -1];
/external/llvm/test/CodeGen/X86/
Davx-intrinsics-fast-isel.ll2005 %res9 = insertelement <32 x i8> %res8, i8 %a22, i32 9
2006 %res10 = insertelement <32 x i8> %res9, i8 %a21, i32 10
2109 %res9 = insertelement <16 x i16> %res8, i16 %a6 , i32 9
2110 %res10 = insertelement <16 x i16> %res9, i16 %a5 , i32 10
2336 %res9 = insertelement <32 x i8> %res8, i8 %a0, i32 9
2337 %res10 = insertelement <32 x i8> %res9, i8 %a0, i32 10
2389 %res9 = insertelement <16 x i16> %res8, i16 %a0, i32 9
2390 %res10 = insertelement <16 x i16> %res9, i16 %a0, i32 10
2642 %res9 = insertelement <32 x i8> %res8, i8 %a9 , i32 9
2643 %res10 = insertelement <32 x i8> %res9, i8 %a10, i32 10
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Dmerge-consecutive-loads-128.ll535 %res9 = insertelement <16 x i8> %res8, i8 %val9, i32 9
536 %resA = insertelement <16 x i8> %res9, i8 %valA, i32 10
Dsse2-intrinsics-fast-isel.ll2150 %res9 = insertelement <16 x i8> %res8, i8 %a6 , i32 9
2151 %res10 = insertelement <16 x i8> %res9, i8 %a5 , i32 10
2337 %res9 = insertelement <16 x i8> %res8, i8 %a0, i32 9
2338 %res10 = insertelement <16 x i8> %res9, i8 %a0, i32 10
2544 %res9 = insertelement <16 x i8> %res8, i8 %a9 , i32 9
2545 %res10 = insertelement <16 x i8> %res9, i8 %a10, i32 10