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Searched refs:rt_reg (Results 1 – 6 of 6) sorted by relevance

/external/v8/src/mips64/
Dsimulator-mips64.cc3434 SetResult(rt_reg(), FCSR_); in DecodeTypeRegisterCOP1()
3437 set_register(rt_reg(), in DecodeTypeRegisterCOP1()
3439 TraceRegWr(get_register(rt_reg()), WORD_DWORD); in DecodeTypeRegisterCOP1()
3442 SetResult(rt_reg(), get_fpu_register(fs_reg())); in DecodeTypeRegisterCOP1()
3445 SetResult(rt_reg(), get_fpu_register_hi_word(fs_reg())); in DecodeTypeRegisterCOP1()
4048 SetResult(rt_reg(), alu_out); in DecodeTypeRegisterSPECIAL3()
4059 SetResult(rt_reg(), alu_out); in DecodeTypeRegisterSPECIAL3()
4070 SetResult(rt_reg(), alu_out); in DecodeTypeRegisterSPECIAL3()
4081 SetResult(rt_reg(), alu_out); in DecodeTypeRegisterSPECIAL3()
4092 SetResult(rt_reg(), alu_out); in DecodeTypeRegisterSPECIAL3()
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Dsimulator-mips64.h384 inline int32_t rt_reg() const { return instr_.RtValue(); } in rt_reg() function
385 inline int64_t rt() const { return get_register(rt_reg()); } in rt()
387 return static_cast<uint64_t>(get_register(rt_reg())); in rt_u()
Ddisasm-mips64.cc1739 int rt_reg = instr->RtValue(); in DecodeTypeImmediate() local
1741 if (rs_reg >= rt_reg) { in DecodeTypeImmediate()
1744 DCHECK(rt_reg > 0); in DecodeTypeImmediate()
1758 int rt_reg = instr->RtValue(); in DecodeTypeImmediate() local
1760 if (rs_reg >= rt_reg) { in DecodeTypeImmediate()
1763 DCHECK(rt_reg > 0); in DecodeTypeImmediate()
/external/v8/src/mips/
Dsimulator-mips.cc2614 int32_t rt_reg = instr_.RtValue(); in DecodeTypeRegisterDRsType() local
2615 int32_t rt = get_register(rt_reg); in DecodeTypeRegisterDRsType()
3546 SetResult(rt_reg(), FCSR_); in DecodeTypeRegisterCOP1()
3549 SetResult(rt_reg(), get_fpu_register_word(fs_reg())); in DecodeTypeRegisterCOP1()
3553 SetResult(rt_reg(), get_fpu_register_hi_word(fs_reg())); in DecodeTypeRegisterCOP1()
3555 SetResult(rt_reg(), get_fpu_register_word(fs_reg() + 1)); in DecodeTypeRegisterCOP1()
3561 int32_t reg = registers_[rt_reg()]; in DecodeTypeRegisterCOP1()
3574 set_fpu_register_word(fs_reg(), registers_[rt_reg()]); in DecodeTypeRegisterCOP1()
3579 set_fpu_register_hi_word(fs_reg(), registers_[rt_reg()]); in DecodeTypeRegisterCOP1()
3582 set_fpu_register_word(fs_reg() + 1, registers_[rt_reg()]); in DecodeTypeRegisterCOP1()
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Ddisasm-mips.cc1545 int rt_reg = instr->RtValue(); in DecodeTypeImmediate() local
1547 if (rs_reg >= rt_reg) { in DecodeTypeImmediate()
1550 DCHECK(rt_reg > 0); in DecodeTypeImmediate()
1562 int rt_reg = instr->RtValue(); in DecodeTypeImmediate() local
1564 if (rs_reg >= rt_reg) { in DecodeTypeImmediate()
1567 DCHECK(rt_reg > 0); in DecodeTypeImmediate()
Dsimulator-mips.h363 inline int32_t rt_reg() const { return instr_.RtValue(); } in rt_reg() function
364 inline int32_t rt() const { return get_register(rt_reg()); } in rt()
366 return static_cast<uint32_t>(get_register(rt_reg())); in rt_u()