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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dinlineasm3.ll41 tail call void asm sideeffect "flds s15, $0 \0A", "^Uv|m,~{s15}"(float 1.000000e+00) nounwind
50 call void asm sideeffect "flds s15, $0 \0A", "*^Uv,~{s15}"(float* @k.2126) nounwind
58 call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind
67 ; CHECK: flds s15, s0
68 %0 = tail call float asm "flds s15, $0", "=x"() nounwind
77 ; CHECK: flds s15, d0
78 %0 = tail call double asm "flds s15, $0", "=x"() nounwind
87 ; CHECK: flds s15, s0
88 %0 = tail call float asm "flds s15, $0", "=t"() nounwind
/external/llvm/test/CodeGen/ARM/
Dinlineasm3.ll42 tail call void asm sideeffect "flds s15, $0 \0A", "^Uv|m,~{s15}"(float 1.000000e+00) nounwind
51 call void asm sideeffect "flds s15, $0 \0A", "*^Uv,~{s15}"(float* @k.2126) nounwind
59 call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind
68 ; CHECK: flds s15, s0
69 %0 = tail call float asm "flds s15, $0", "=x"() nounwind
78 ; CHECK: flds s15, d0
79 %0 = tail call double asm "flds s15, $0", "=x"() nounwind
88 ; CHECK: flds s15, s0
89 %0 = tail call float asm "flds s15, $0", "=t"() nounwind
/external/selinux/mcstrans/share/examples/include/
Ddefault.test2 SystemHigh==s15:c0.c1023
3 SystemLow-SystemHigh==s0-s15:c0.c1023
13 Unclassified-SystemHigh==s1-s15:c0.c1023
25 Secret-SystemHigh==s2-s15:c0.c1023
27 Secret:A-SystemHigh==s2:c0-s15:c0.c1023
29 Secret:B-SystemHigh==s2:c1-s15:c0.c1023
30 Secret:AB-SystemHigh==s2:c0,c1-s15:c0.c1023
/external/selinux/mcstrans/share/examples/default/
Ddefault.test2 SystemHigh==s15:c0.c1023
3 SystemLow-SystemHigh==s0-s15:c0.c1023
13 Unclassified-SystemHigh==s1-s15:c0.c1023
25 Secret-SystemHigh==s2-s15:c0.c1023
27 Secret:A-SystemHigh==s2:c0-s15:c0.c1023
29 Secret:B-SystemHigh==s2:c1-s15:c0.c1023
30 Secret:AB-SystemHigh==s2:c0,c1-s15:c0.c1023
Dsetrans.conf20 s15:c0.c1023=SystemHigh
21 s0-s15:c0.c1023=SystemLow-SystemHigh
34 s1-s15:c0.c1023=Unclassified-SystemHigh
47 s2-s15:c0.c1023=Secret-SystemHigh
49 s2:c0-s15:c0.c1023=Secret:A-SystemHigh
51 s2:c1-s15:c0.c1023=Secret:B-SystemHigh
52 s2:c0,c1-s15:c0.c1023=Secret:AB-SystemHigh
/external/selinux/mcstrans/share/examples/include/setrans.d/
Dinclude-example20 s15:c0.c1023=SystemHigh
21 s0-s15:c0.c1023=SystemLow-SystemHigh
34 s1-s15:c0.c1023=Unclassified-SystemHigh
47 s2-s15:c0.c1023=Secret-SystemHigh
49 s2:c0-s15:c0.c1023=Secret:A-SystemHigh
51 s2:c1-s15:c0.c1023=Secret:B-SystemHigh
52 s2:c0,c1-s15:c0.c1023=Secret:AB-SystemHigh
/external/compiler-rt/lib/builtins/arm/
Dfixunssfsivfp.S23 vmov s15, r0 // load float register from R0
24 vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15
25 vmov r0, s15 // move s15 to result register
Dfixsfsivfp.S22 vmov s15, r0 // load float register from R0
23 vcvt.s32.f32 s15, s15 // convert single to 32-bit int into s15
24 vmov r0, s15 // move s15 to result register
Dfloatunssisfvfp.S22 vmov s15, r0 // move int to float register s15
23 vcvt.f32.u32 s15, s15 // convert 32-bit int in s15 to float in s15
24 vmov r0, s15 // move s15 to result register
Dfloatsisfvfp.S22 vmov s15, r0 // move int to float register s15
23 vcvt.f32.s32 s15, s15 // convert 32-bit int in s15 to float in s15
24 vmov r0, s15 // move s15 to result register
Dfloatunssidfvfp.S22 vmov s15, r0 // move int to float register s15
23 vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
Dextendsfdf2vfp.S22 vmov s15, r0 // load float register from R0
23 vcvt.f64.f32 d7, s15 // convert single to double
Dtruncdfsf2vfp.S23 vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
24 vmov r0, s15 // return result in r0
Dfloatsidfvfp.S22 vmov s15, r0 // move int to float register s15
23 vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
Dfixdfsivfp.S23 vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15
24 vmov r0, s15 // move s15 to result register
Dfixunsdfsivfp.S24 vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15
25 vmov r0, s15 // move s15 to result register
Dsubsf3vfp.S23 vmov s15, r1 // move second param from r1 into float register
24 vsub.f32 s14, s14, s15
Daddsf3vfp.S22 vmov s15, r1 // move second param from r1 into float register
23 vadd.f32 s14, s14, s15
Dmulsf3vfp.S22 vmov s15, r1 // move second param from r1 into float register
23 vmul.f32 s13, s14, s15
Ddivsf3vfp.S22 vmov s15, r1 // move second param from r1 into float register
23 vdiv.f32 s13, s14, s15
Dgesf2vfp.S23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
/external/valgrind/none/tests/arm/
Dvfpv4_fma.c109 TESTINSN_bin_f32("vfma.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(0.0)); in main()
110 TESTINSN_bin_f32("vfma.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(NAN)); in main()
115 …TESTINSN_bin_f32("vfma.f32 s30, s15, s2", s30, s15, i32, f2u(-45667.24), s2, i32, f2u(-248562.76)… in main()
118 TESTINSN_bin_f32("vfma.f32 s29, s15, s7", s29, s15, i32, f2u(214), s7, i32, f2u(1752065)); in main()
128 TESTINSN_bin_f32("vfma.f32 s20, s13, s15", s20, s13, i32, f2u(-INFINITY), s15, i32, f2u(0.0)); in main()
129 TESTINSN_bin_f32("vfma.f32 s10, s23, s15", s10, s23, i32, f2u(INFINITY), s15, i32, f2u(0.0)); in main()
159 TESTINSN_bin_f32("vfms.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(0.0)); in main()
160 TESTINSN_bin_f32("vfms.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(NAN)); in main()
165 …TESTINSN_bin_f32("vfms.f32 s30, s15, s2", s30, s15, i32, f2u(-45667.24), s2, i32, f2u(-248562.76)… in main()
168 TESTINSN_bin_f32("vfms.f32 s29, s15, s7", s29, s15, i32, f2u(214), s7, i32, f2u(1752065)); in main()
[all …]
Dvfp.c1157 TESTINSN_bin_f32("vmla.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(0.0)); in main()
1158 TESTINSN_bin_f32("vmla.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(NAN)); in main()
1163 …TESTINSN_bin_f32("vmla.f32 s30, s15, s2", s30, s15, i32, f2u(-45667.24), s2, i32, f2u(-248562.76)… in main()
1166 TESTINSN_bin_f32("vmla.f32 s29, s15, s7", s29, s15, i32, f2u(214), s7, i32, f2u(1752065)); in main()
1176 TESTINSN_bin_f32("vmla.f32 s20, s13, s15", s20, s13, i32, f2u(-INFINITY), s15, i32, f2u(0.0)); in main()
1177 TESTINSN_bin_f32("vmla.f32 s10, s23, s15", s10, s23, i32, f2u(INFINITY), s15, i32, f2u(0.0)); in main()
1207 TESTINSN_bin_f32("vnmla.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(0.0)); in main()
1208 TESTINSN_bin_f32("vnmla.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(NAN)); in main()
1213 …TESTINSN_bin_f32("vnmla.f32 s30, s15, s2", s30, s15, i32, f2u(-45667.24), s2, i32, f2u(-248562.76… in main()
1216 TESTINSN_bin_f32("vnmla.f32 s29, s15, s7", s29, s15, i32, f2u(214), s7, i32, f2u(1752065)); in main()
[all …]
/external/libvpx/libvpx/vpx_dsp/mips/
Ditrans16_dspr2.c1061 int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15; in iadst16_dspr2() local
1104 s15 = x14 * cospi_3_64 - x15 * cospi_29_64; in iadst16_dspr2()
1113 x7 = dct_const_round_shift(s7 + s15); in iadst16_dspr2()
1121 x15 = dct_const_round_shift(s7 - s15); in iadst16_dspr2()
1139 s15 = x14 * cospi_20_64 + x15 * cospi_12_64; in iadst16_dspr2()
1152 x11 = dct_const_round_shift(s11 + s15); in iadst16_dspr2()
1156 x15 = dct_const_round_shift(s11 - s15); in iadst16_dspr2()
1174 s15 = x14 * cospi_8_64 + x15 * cospi_24_64; in iadst16_dspr2()
1189 x13 = dct_const_round_shift(s13 + s15); in iadst16_dspr2()
1191 x15 = dct_const_round_shift(s13 - s15); in iadst16_dspr2()
[all …]
/external/boringssl/src/ssl/test/runner/ed25519/internal/edwards25519/
Dedwards25519.go1078 s15 := a4*b11 + a5*b10 + a6*b9 + a7*b8 + a8*b7 + a9*b6 + a10*b5 + a11*b4
1110 s15 += carry[14]
1146 carry[15] = (s15 + (1 << 20)) >> 21
1148 s15 -= carry[15] << 21
1163 s15 += s23 * 136657
1172 s15 -= s22 * 683901
1220 s15 += carry[14]
1238 carry[15] = (s15 + (1 << 20)) >> 21
1240 s15 -= carry[15] << 21
1258 s3 += s15 * 666643
[all …]

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