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/external/llvm/test/MC/ARM/
Dfullfp16.s91 vcvt.f16.s16 s17, s17, #1
95 vcvt.s16.f16 s17, s17, #1
99 @ ARM: vcvt.f16.s16 s17, s17, #1 @ encoding: [0x67,0x89,0xfa,0xee]
103 @ ARM: vcvt.s16.f16 s17, s17, #1 @ encoding: [0x67,0x89,0xfe,0xee]
107 @ THUMB: vcvt.f16.s16 s17, s17, #1 @ encoding: [0xfa,0xee,0x67,0x89]
111 @ THUMB: vcvt.s16.f16 s17, s17, #1 @ encoding: [0xfe,0xee,0x67,0x89]
125 vcvtm.s32.f16 s17, s8
126 @ ARM: vcvtm.s32.f16 s17, s8 @ encoding: [0xc4,0x89,0xff,0xfe]
127 @ THUMB: vcvtm.s32.f16 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x89]
141 vcvtm.u32.f16 s17, s8
[all …]
Dfp-armv8.s40 vcvtm.s32.f32 s17, s8
41 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xc4,0x8a,0xff,0xfe]
42 vcvtm.s32.f64 s17, d8
43 @ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xc8,0x8b,0xff,0xfe]
57 vcvtm.u32.f32 s17, s8
58 @ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0x44,0x8a,0xff,0xfe]
59 vcvtm.u32.f64 s17, d8
60 @ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0x48,0x8b,0xff,0xfe]
Dthumb-fp-armv8.s43 vcvtm.s32.f32 s17, s8
44 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x8a]
45 vcvtm.s32.f64 s17, d8
46 @ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xff,0xfe,0xc8,0x8b]
60 vcvtm.u32.f32 s17, s8
61 @ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0xff,0xfe,0x44,0x8a]
62 vcvtm.u32.f64 s17, d8
63 @ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0xff,0xfe,0x48,0x8b]
Dfullfp16-neg.s69 vcvt.f16.s16 s17, s17, #1
73 vcvt.s16.f16 s17, s17, #1
92 vcvtm.s32.f16 s17, s8
104 vcvtm.u32.f16 s17, s8
Dsimple-fp-encoding.s362 vcvt.f32.s16 s17, s17, #1
370 vcvt.s16.f32 s17, s17, #1
379 @ CHECK: vcvt.f32.s16 s17, s17, #1 @ encoding: [0x67,0x8a,0xfa,0xee]
388 @ CHECK: vcvt.s16.f32 s17, s17, #1 @ encoding: [0x67,0x8a,0xfe,0xee]
/external/capstone/suite/MC/ARM/
Dfp-armv8.s.cs16 0xc4,0x8a,0xff,0xfe = vcvtm.s32.f32 s17, s8
17 0xc8,0x8b,0xff,0xfe = vcvtm.s32.f64 s17, d8
24 0x44,0x8a,0xff,0xfe = vcvtm.u32.f32 s17, s8
25 0x48,0x8b,0xff,0xfe = vcvtm.u32.f64 s17, d8
Dthumb-fp-armv8.s.cs16 0xff,0xfe,0xc4,0x8a = vcvtm.s32.f32 s17, s8
17 0xff,0xfe,0xc8,0x8b = vcvtm.s32.f64 s17, d8
24 0xff,0xfe,0x44,0x8a = vcvtm.u32.f32 s17, s8
25 0xff,0xfe,0x48,0x8b = vcvtm.u32.f64 s17, d8
Dsimple-fp-encoding.s.cs146 0x67,0x8a,0xfa,0xee = vcvt.f32.s16 s17, s17, #1
154 0x67,0x8a,0xfe,0xee = vcvt.s16.f32 s17, s17, #1
/external/llvm/test/MC/Disassembler/ARM/
Dfullfp16-thumb.txt68 # CHECK: vcvt.f16.s16 s17, s17, #1
72 # CHECK: vcvt.s16.f16 s17, s17, #1
91 # CHECK: vcvtm.s32.f16 s17, s8
103 # CHECK: vcvtm.u32.f16 s17, s8
Dfullfp16-arm.txt68 # CHECK: vcvt.f16.s16 s17, s17, #1
72 # CHECK: vcvt.s16.f16 s17, s17, #1
91 # CHECK: vcvtm.s32.f16 s17, s8
103 # CHECK: vcvtm.u32.f16 s17, s8
Dthumb-fp-armv8.txt51 # CHECK: vcvtm.s32.f32 s17, s8
54 # CHECK: vcvtm.s32.f64 s17, d8
75 # CHECK: vcvtm.u32.f32 s17, s8
78 # CHECK: vcvtm.u32.f64 s17, d8
Dfp-armv8.txt47 # CHECK: vcvtm.s32.f32 s17, s8
50 # CHECK: vcvtm.s32.f64 s17, d8
71 # CHECK: vcvtm.u32.f32 s17, s8
74 # CHECK: vcvtm.u32.f64 s17, d8
/external/llvm/test/MC/AArch64/
Dneon-scalar-extract-narrow.s22 sqxtn h20, s17
35 uqxtn h20, s17
Dneon-scalar-mul.s41 sqdmlal s17, h27, h12
Dneon-scalar-by-elem-mla.s30 fmls s7, s17, v26.s[3]
/external/capstone/suite/MC/AArch64/
Dneon-scalar-extract-narrow.s.cs6 0x34,0x4a,0x61,0x5e = sqxtn h20, s17
9 0x34,0x4a,0x61,0x7e = uqxtn h20, s17
Dneon-scalar-mul.s.cs8 0x71,0x93,0x6c,0x5e = sqdmlal s17, h27, h12
Dneon-scalar-by-elem-mla.s.cs11 0x27,0x5a,0xba,0x5f = fmls s7, s17, v26.s[3]
/external/boringssl/src/ssl/test/runner/ed25519/internal/edwards25519/
Dedwards25519.go1080 s17 := a6*b11 + a7*b10 + a8*b9 + a9*b8 + a10*b7 + a11*b6
1113 s17 += carry[16]
1149 carry[17] = (s17 + (1 << 20)) >> 21
1151 s17 -= carry[17] << 21
1223 s17 += carry[16]
1242 s5 += s17 * 666643
1243 s6 += s17 * 470296
1244 s7 += s17 * 654183
1245 s8 -= s17 * 997805
1246 s9 += s17 * 136657
[all …]
/external/clang/test/CodeGen/
Darm-arguments.c99 struct s17 { short f0 : 13; char f1 : 4; }; argument
100 struct s17 f17(void) {} in f17()
Dppc64le-aggregates.c369 struct s17 { char c[17]; }; argument
423 struct s17 ret_s17() { in ret_s17()
424 return (struct s17) { 17, 18, 19, 20, 21, 22, 23, 24, in ret_s17()
/external/clang/test/Sema/
Dbitfield-layout_1.c169 } s17; variable
170 CHECK_SIZE(s17,12)
/external/swiftshader/third_party/subzero/src/
DIceRegistersARM32.def54 X(Reg_s17, 17, "s17", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s17, d8, q4)) \
80 X(Reg_d8, 8, "d8", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d8, q4, s16, s17)) \
111 …X(Reg_q4, 4, "q4", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q4, d8, d9, s16, s17, s18, …
/external/llvm/test/CodeGen/AArch64/
Dremat-float0.ll15 …~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s2…
/external/boringssl/src/third_party/fiat/
Dcurve25519.c2155 int64_t s17 = 2097151 & (load_4(s + 44) >> 5); in x25519_sc_reduce() local
2244 s17 += carry16; in x25519_sc_reduce()
2263 s5 += s17 * 666643; in x25519_sc_reduce()
2264 s6 += s17 * 470296; in x25519_sc_reduce()
2265 s7 += s17 * 654183; in x25519_sc_reduce()
2266 s8 -= s17 * 997805; in x25519_sc_reduce()
2267 s9 += s17 * 136657; in x25519_sc_reduce()
2268 s10 -= s17 * 683901; in x25519_sc_reduce()
2269 s17 = 0; in x25519_sc_reduce()
2533 int64_t s17; in sc_muladd() local
[all …]

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