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/external/llvm/test/MC/AArch64/
Dneon-scalar-by-elem-saturating-mul.s30 sqdmulh s25, s26, v27.s[3]
47 sqrdmulh s20, s26, v27.s[1]
Dbasic-a64-diagnostics.s2575 ldp s6, s26, [x4, #-260]
2678 ldp s6, s26, [x4], #-260
2781 ldp s6, s26, [x4, #-260]!
2870 ldnp s6, s26, [x4, #-260]
Dbasic-a64-instructions.s1881 fcvt s26, h27
2113 fcvtas w25, s26
3025 stp s27, s26, [sp, #-256]
3073 stp s27, s26, [sp], #-256
3120 stp s27, s26, [sp, #-256]!
3161 stnp s27, s26, [sp, #-256]
/external/capstone/suite/MC/AArch64/
Dneon-scalar-by-elem-saturating-mul.s.cs12 0x59,0xcb,0xbb,0x5f = sqdmulh s25, s26, v27.s[3]
18 0x54,0xd3,0xbb,0x5f = sqrdmulh s20, s26, v27.s[1]
Dbasic-a64-instructions.s.cs729 0x7a,0x43,0xe2,0x1e = fcvt s26, h27
825 0x59,0x03,0x24,0x1e = fcvtas w25, s26
1204 0xfb,0x6b,0x20,0x2d = stp s27, s26, [sp, #-256]
1223 0xfb,0x6b,0xa0,0x2c = stp s27, s26, [sp], #-256
1242 0xfb,0x6b,0xa0,0x2d = stp s27, s26, [sp, #-256]!
1258 0xfb,0x6b,0x20,0x2c = stnp s27, s26, [sp, #-256]
/external/llvm/test/MC/ARM/
Dd16.s23 @ D16-NEXT: vcvt.f32.f64 s26, d30
24 vcvt.f32.f64 s26, d30
Dsimple-fp-encoding.s323 @ CHECK: vmovne s25, s26, r2, r5
324 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c]
/external/swiftshader/third_party/subzero/src/
DIceRegistersARM32.def63 X(Reg_s26, 26, "s26", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s26, d13, q6)) \
85 X(Reg_d13, 13, "d13", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d13, q6, s26, s27)) \
113 …, 6, "q6", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q6, d12, d13, s24, s25, s26, s27)) \
/external/llvm/test/CodeGen/AArch64/
Dremat-float0.ll15 …5},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s2…
/external/llvm/test/MC/Disassembler/ARM/
Dd16.txt21 # D32: vcvt.f32.f64 s26, d30
Dfp-encoding.txt227 # CHECK: vstmdbeq r12!, {s25, s26, s27, s28}
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dsimple-fp-encoding.s244 @ CHECK: vmovne s25, s26, r2, r5
245 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c]
/external/clang/test/CodeGen/
Dx86_32-arguments-darwin.c120 struct s26 { struct { char a, b; } a; struct { char a, b; } b; } f26(void) { while (1) {} } in f26() argument
/external/llvm/test/CodeGen/MIR/ARM/
DARMLoadStoreDBG.mir96 '%s22', '%s23', '%s24', '%s25', '%s26', '%s27',
Dsched-it-debug-nodes.mir107 '%s22', '%s23', '%s24', '%s25', '%s26', '%s27',
/external/vixl/test/aarch64/
Dtest-api-aarch64.cc180 VIXL_CHECK(AreConsecutive(s26, s27, s28, s29)); in TEST()
Dtest-trace-aarch64.cc407 __ facgt(s12, s26, s12); in GenerateTestSequenceFP()
491 __ fcvtpu(wzr, s26); in GenerateTestSequenceFP()
520 __ fdiv(s26, s5, s25); in GenerateTestSequenceFP()
548 __ fnmadd(s0, s18, s26, s18); in GenerateTestSequenceFP()
550 __ fnmsub(s29, s0, s11, s26); in GenerateTestSequenceFP()
592 __ scvtf(s26, x12, 38); in GenerateTestSequenceFP()
1257 __ mov(s26, v19.S(), 0); in GenerateTestSequenceNEON()
1570 __ sqdmull(d25, s2, s26); in GenerateTestSequenceNEON()
1608 __ sqrshl(s26, s18, s2); in GenerateTestSequenceNEON()
2355 __ uqshrn(h28, s26, 11); in GenerateTestSequenceNEON()
[all …]
Dtest-assembler-aarch64.cc7524 __ ldr(s26, &after_s); in TEST()
7556 ASSERT_EQUAL_FP32(2.5, s26); in TEST()
7611 __ ldr(s26, &after_s); in TEST()
7642 ASSERT_EQUAL_FP32(2.5, s26); in TEST()
7878 __ ldr(s26, &after_s); in TEST()
7907 ASSERT_EQUAL_FP32(2.5, s26); in TEST()
11170 __ Fmov(s26, -0.0); in TEST()
11183 __ Frinta(s10, s26); in TEST()
11260 __ Fmov(s26, -0.0); in TEST()
11273 __ Frinti(s10, s26); in TEST()
[all …]
/external/v8/src/arm/
Dsimulator-arm.h123 s24, s25, s26, s27, s28, s29, s30, s31, enumerator
/external/v8/benchmarks/
Dregexp.js207 var s26 = computeInputVariants('VC=74.125.75.1', 81);
242 re8.exec(s26[i]);
/external/vixl/test/test-trace-reference/
Dlog-disasm330 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12
414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26
443 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25
471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18
473 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26
515 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38
1023 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0]
1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26
1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2
2012 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11
[all …]
Dlog-disasm-colour330 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12
414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26
443 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25
471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18
473 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26
515 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38
1023 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0]
1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26
1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2
2012 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11
[all …]
Dlog-vregs93 # v26: 0x00000000000000000000000000000000 (s26: 0.00000)
163 # v26: 0x0000000000000000000000003c7fffff (s26: 0.0156250)
607 # v26: 0x00000000000000008887868588878685 (s26: -8.15664e-34) <- 0x~~~~~~~~~~~~~~~~
705 # v26: 0x00000000000000000002ff010002ff01 (s26: 2.75149e-40) <- 0x~~~~~~~~~~~~~~~~
Dlog-all796 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12
964 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26
1021 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25
1022 # v26: 0x00000000000000000000000000000000 (s26: 0.00000)
1077 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18
1081 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26
1165 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38
1166 # v26: 0x0000000000000000000000003c7fffff (s26: 0.0156250)
1988 # v26: 0x00000000000000008887868588878685 (s26: -8.15664e-34) <- 0x~~~~~~~~~~~~~~~~
2180 # v26: 0x00000000000000000002ff010002ff01 (s26: 2.75149e-40) <- 0x~~~~~~~~~~~~~~~~
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMRegisterInfo.td87 def S26 : ARMFReg<26, "s26">; def S27 : ARMFReg<27, "s27">;

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