/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 86 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering() 87 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 77 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering() 78 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetLowering.h | 1083 void setIndexedLoadAction(unsigned IdxMode, MVT VT, in setIndexedLoadAction() function
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 92 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering() 93 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering() 94 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering() 95 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering() 96 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 442 setIndexedLoadAction(im, MVT::i8, Legal); in AArch64TargetLowering() 443 setIndexedLoadAction(im, MVT::i16, Legal); in AArch64TargetLowering() 444 setIndexedLoadAction(im, MVT::i32, Legal); in AArch64TargetLowering() 445 setIndexedLoadAction(im, MVT::i64, Legal); in AArch64TargetLowering() 446 setIndexedLoadAction(im, MVT::f64, Legal); in AArch64TargetLowering() 447 setIndexedLoadAction(im, MVT::f32, Legal); in AArch64TargetLowering() 448 setIndexedLoadAction(im, MVT::f16, Legal); in AArch64TargetLowering() 711 setIndexedLoadAction(im, VT, Legal); in addTypeForNEON()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 97 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering() 98 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering() 99 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering() 100 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering() 101 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering() 102 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering() 103 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering() 723 setIndexedLoadAction(ISD::PRE_INC, MVT::v4f64, Legal); in PPCTargetLowering() 769 setIndexedLoadAction(ISD::PRE_INC, MVT::v4f32, Legal); in PPCTargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 1456 void setIndexedLoadAction(unsigned IdxMode, MVT VT, in setIndexedLoadAction() function
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 858 setIndexedLoadAction(IM, VT, Expand); in initActions()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 2067 setIndexedLoadAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering() 2073 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 536 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering() 537 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering() 538 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering() 539 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 560 setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand); in TargetLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 709 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering() 710 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering() 711 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering() 712 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering()
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/external/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 1332 * ``setIndexedLoadAction`` --- Indexed load.
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