/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 221 setTargetDAGCombine(ISD::FADD); in SITargetLowering() 222 setTargetDAGCombine(ISD::FSUB); in SITargetLowering() 223 setTargetDAGCombine(ISD::FMINNUM); in SITargetLowering() 224 setTargetDAGCombine(ISD::FMAXNUM); in SITargetLowering() 225 setTargetDAGCombine(ISD::SMIN); in SITargetLowering() 226 setTargetDAGCombine(ISD::SMAX); in SITargetLowering() 227 setTargetDAGCombine(ISD::UMIN); in SITargetLowering() 228 setTargetDAGCombine(ISD::UMAX); in SITargetLowering() 229 setTargetDAGCombine(ISD::SETCC); in SITargetLowering() 230 setTargetDAGCombine(ISD::AND); in SITargetLowering() [all …]
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D | AMDGPUISelLowering.cpp | 474 setTargetDAGCombine(ISD::BITCAST); in AMDGPUTargetLowering() 475 setTargetDAGCombine(ISD::AND); in AMDGPUTargetLowering() 476 setTargetDAGCombine(ISD::SHL); in AMDGPUTargetLowering() 477 setTargetDAGCombine(ISD::SRA); in AMDGPUTargetLowering() 478 setTargetDAGCombine(ISD::SRL); in AMDGPUTargetLowering() 479 setTargetDAGCombine(ISD::MUL); in AMDGPUTargetLowering() 480 setTargetDAGCombine(ISD::SELECT); in AMDGPUTargetLowering() 481 setTargetDAGCombine(ISD::SELECT_CC); in AMDGPUTargetLowering() 482 setTargetDAGCombine(ISD::STORE); in AMDGPUTargetLowering() 483 setTargetDAGCombine(ISD::FADD); in AMDGPUTargetLowering() [all …]
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D | R600ISelLowering.cpp | 195 setTargetDAGCombine(ISD::FP_ROUND); in R600TargetLowering() 196 setTargetDAGCombine(ISD::FP_TO_SINT); in R600TargetLowering() 197 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in R600TargetLowering() 198 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering() 199 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in R600TargetLowering()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 76 setTargetDAGCombine(ISD::SHL); in MipsSETargetLowering() 77 setTargetDAGCombine(ISD::SRA); in MipsSETargetLowering() 78 setTargetDAGCombine(ISD::SRL); in MipsSETargetLowering() 79 setTargetDAGCombine(ISD::SETCC); in MipsSETargetLowering() 80 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering() 95 setTargetDAGCombine(ISD::AND); in MipsSETargetLowering() 96 setTargetDAGCombine(ISD::OR); in MipsSETargetLowering() 97 setTargetDAGCombine(ISD::SRA); in MipsSETargetLowering() 98 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering() 99 setTargetDAGCombine(ISD::XOR); in MipsSETargetLowering() [all …]
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D | MipsISelLowering.cpp | 421 setTargetDAGCombine(ISD::SDIVREM); in MipsTargetLowering() 422 setTargetDAGCombine(ISD::UDIVREM); in MipsTargetLowering() 423 setTargetDAGCombine(ISD::SELECT); in MipsTargetLowering() 424 setTargetDAGCombine(ISD::AND); in MipsTargetLowering() 425 setTargetDAGCombine(ISD::OR); in MipsTargetLowering() 426 setTargetDAGCombine(ISD::ADD); in MipsTargetLowering() 427 setTargetDAGCombine(ISD::AssertZext); in MipsTargetLowering()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 127 setTargetDAGCombine(ISD::ADD); in LanaiTargetLowering() 128 setTargetDAGCombine(ISD::SUB); in LanaiTargetLowering() 129 setTargetDAGCombine(ISD::AND); in LanaiTargetLowering() 130 setTargetDAGCombine(ISD::OR); in LanaiTargetLowering() 131 setTargetDAGCombine(ISD::XOR); in LanaiTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 217 setTargetDAGCombine(ISD::ADDE); in MipsTargetLowering() 218 setTargetDAGCombine(ISD::SUBE); in MipsTargetLowering() 219 setTargetDAGCombine(ISD::SDIVREM); in MipsTargetLowering() 220 setTargetDAGCombine(ISD::UDIVREM); in MipsTargetLowering() 221 setTargetDAGCombine(ISD::SETCC); in MipsTargetLowering() 222 setTargetDAGCombine(ISD::AND); in MipsTargetLowering() 223 setTargetDAGCombine(ISD::OR); in MipsTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 505 setTargetDAGCombine(ISD::INTRINSIC_VOID); in ARMTargetLowering() 506 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in ARMTargetLowering() 507 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in ARMTargetLowering() 508 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering() 509 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering() 510 setTargetDAGCombine(ISD::SRA); in ARMTargetLowering() 511 setTargetDAGCombine(ISD::SIGN_EXTEND); in ARMTargetLowering() 512 setTargetDAGCombine(ISD::ZERO_EXTEND); in ARMTargetLowering() 513 setTargetDAGCombine(ISD::ANY_EXTEND); in ARMTargetLowering() 514 setTargetDAGCombine(ISD::SELECT_CC); in ARMTargetLowering() [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 462 setTargetDAGCombine(ISD::OR); in AArch64TargetLowering() 466 setTargetDAGCombine(ISD::ADD); in AArch64TargetLowering() 467 setTargetDAGCombine(ISD::SUB); in AArch64TargetLowering() 468 setTargetDAGCombine(ISD::SRL); in AArch64TargetLowering() 469 setTargetDAGCombine(ISD::XOR); in AArch64TargetLowering() 470 setTargetDAGCombine(ISD::SINT_TO_FP); in AArch64TargetLowering() 471 setTargetDAGCombine(ISD::UINT_TO_FP); in AArch64TargetLowering() 473 setTargetDAGCombine(ISD::FP_TO_SINT); in AArch64TargetLowering() 474 setTargetDAGCombine(ISD::FP_TO_UINT); in AArch64TargetLowering() 475 setTargetDAGCombine(ISD::FDIV); in AArch64TargetLowering() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 615 setTargetDAGCombine(ISD::INTRINSIC_VOID); in ARMTargetLowering() 616 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in ARMTargetLowering() 617 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in ARMTargetLowering() 618 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering() 619 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering() 620 setTargetDAGCombine(ISD::SRA); in ARMTargetLowering() 621 setTargetDAGCombine(ISD::SIGN_EXTEND); in ARMTargetLowering() 622 setTargetDAGCombine(ISD::ZERO_EXTEND); in ARMTargetLowering() 623 setTargetDAGCombine(ISD::ANY_EXTEND); in ARMTargetLowering() 624 setTargetDAGCombine(ISD::BUILD_VECTOR); in ARMTargetLowering() [all …]
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 173 setTargetDAGCombine(ISD::STORE); in XCoreTargetLowering() 174 setTargetDAGCombine(ISD::ADD); in XCoreTargetLowering() 175 setTargetDAGCombine(ISD::INTRINSIC_VOID); in XCoreTargetLowering() 176 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in XCoreTargetLowering()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 857 setTargetDAGCombine(ISD::SINT_TO_FP); in PPCTargetLowering() 858 setTargetDAGCombine(ISD::BUILD_VECTOR); in PPCTargetLowering() 860 setTargetDAGCombine(ISD::UINT_TO_FP); in PPCTargetLowering() 861 setTargetDAGCombine(ISD::LOAD); in PPCTargetLowering() 862 setTargetDAGCombine(ISD::STORE); in PPCTargetLowering() 863 setTargetDAGCombine(ISD::BR_CC); in PPCTargetLowering() 865 setTargetDAGCombine(ISD::BRCOND); in PPCTargetLowering() 866 setTargetDAGCombine(ISD::BSWAP); in PPCTargetLowering() 867 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in PPCTargetLowering() 868 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in PPCTargetLowering() [all …]
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 275 setTargetDAGCombine(ISD::ADD); in NVPTXTargetLowering() 276 setTargetDAGCombine(ISD::AND); in NVPTXTargetLowering() 277 setTargetDAGCombine(ISD::FADD); in NVPTXTargetLowering() 278 setTargetDAGCombine(ISD::MUL); in NVPTXTargetLowering() 279 setTargetDAGCombine(ISD::SHL); in NVPTXTargetLowering() 280 setTargetDAGCombine(ISD::SELECT); in NVPTXTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 1138 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in X86TargetLowering() 1139 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in X86TargetLowering() 1140 setTargetDAGCombine(ISD::BITCAST); in X86TargetLowering() 1141 setTargetDAGCombine(ISD::BUILD_VECTOR); in X86TargetLowering() 1142 setTargetDAGCombine(ISD::VSELECT); in X86TargetLowering() 1143 setTargetDAGCombine(ISD::SELECT); in X86TargetLowering() 1144 setTargetDAGCombine(ISD::SHL); in X86TargetLowering() 1145 setTargetDAGCombine(ISD::SRA); in X86TargetLowering() 1146 setTargetDAGCombine(ISD::SRL); in X86TargetLowering() 1147 setTargetDAGCombine(ISD::OR); in X86TargetLowering() [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 438 setTargetDAGCombine(ISD::SIGN_EXTEND); in SystemZTargetLowering() 439 setTargetDAGCombine(ISD::STORE); in SystemZTargetLowering() 440 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in SystemZTargetLowering() 441 setTargetDAGCombine(ISD::FP_ROUND); in SystemZTargetLowering() 442 setTargetDAGCombine(ISD::BSWAP); in SystemZTargetLowering() 443 setTargetDAGCombine(ISD::SHL); in SystemZTargetLowering() 444 setTargetDAGCombine(ISD::SRA); in SystemZTargetLowering() 445 setTargetDAGCombine(ISD::SRL); in SystemZTargetLowering() 446 setTargetDAGCombine(ISD::ROTL); in SystemZTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 450 setTargetDAGCombine(ISD::ADD); in SPUTargetLowering() 451 setTargetDAGCombine(ISD::ZERO_EXTEND); in SPUTargetLowering() 452 setTargetDAGCombine(ISD::SIGN_EXTEND); in SPUTargetLowering() 453 setTargetDAGCombine(ISD::ANY_EXTEND); in SPUTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 159 setTargetDAGCombine(ISD::STORE); in XCoreTargetLowering() 160 setTargetDAGCombine(ISD::ADD); in XCoreTargetLowering()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 1632 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in X86TargetLowering() 1633 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in X86TargetLowering() 1634 setTargetDAGCombine(ISD::BITCAST); in X86TargetLowering() 1635 setTargetDAGCombine(ISD::VSELECT); in X86TargetLowering() 1636 setTargetDAGCombine(ISD::SELECT); in X86TargetLowering() 1637 setTargetDAGCombine(ISD::SHL); in X86TargetLowering() 1638 setTargetDAGCombine(ISD::SRA); in X86TargetLowering() 1639 setTargetDAGCombine(ISD::SRL); in X86TargetLowering() 1640 setTargetDAGCombine(ISD::OR); in X86TargetLowering() 1641 setTargetDAGCombine(ISD::AND); in X86TargetLowering() [all …]
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetLowering.h | 1127 void setTargetDAGCombine(ISD::NodeType NT) { in setTargetDAGCombine() function
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 1512 void setTargetDAGCombine(ISD::NodeType NT) { in setTargetDAGCombine() function
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 386 setTargetDAGCombine(ISD::SINT_TO_FP); in PPCTargetLowering() 387 setTargetDAGCombine(ISD::STORE); in PPCTargetLowering() 388 setTargetDAGCombine(ISD::BR_CC); in PPCTargetLowering() 389 setTargetDAGCombine(ISD::BSWAP); in PPCTargetLowering()
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