/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | mulhi.ll | 42 ; V6: smmla 48 ; M3-NOT: smmla
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/external/llvm/test/CodeGen/ARM/ |
D | mulhi.ll | 42 ; V6: smmla 48 ; M3-NOT: smmla
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/external/valgrind/none/tests/arm/ |
D | v6intARM.stdout.exp | 899 smmla r0, r1, r2, r3 :: rd 0x3fff8000 rm 0x80008000, rn 0x80008000 rs 0x00000000, carryin 0, cpsr … 900 smmla r0, r1, r2, r3 :: rd 0x00000000 rm 0x7fff7fff, rn 0x00000000 rs 0x00000000, carryin 0, cpsr … 901 smmla r0, r1, r2, r3 :: rd 0x00008000 rm 0x7fff7fff, rn 0x00010001 rs 0x00000001, carryin 0, cpsr … 902 smmla r0, r1, r2, r3 :: rd 0x0000001f rm 0x80008000, rn 0xffffffff rs 0x0000001f, carryin 0, cpsr … 903 smmla r0, r1, r2, r3 :: rd 0x0000014c rm 0x00640064, rn 0x00030003 rs 0x00000020, carryin 0, cpsr … 904 smmla r0, r1, r2, r3 :: rd 0x000000ff rm 0xffffffff, rn 0xfffc0001 rs 0x000000ff, carryin 0, cpsr … 905 smmla r0, r1, r2, r3 :: rd 0x000000e5 rm 0xfff70fff, rn 0x00030003 rs 0x00000100, carryin 0, cpsr … 906 smmla r0, r1, r2, r3 :: rd 0x6da42730 rm 0xb8035b5b, rn 0xce0ce1ed rs 0x5f986e68, carryin 0, cpsr … 907 smmla r0, r1, r2, r3 :: rd 0xaf1e71ac rm 0x35232047, rn 0x146275d8 rs 0xaae3433f, carryin 0, cpsr … 908 smmla r0, r1, r2, r3 :: rd 0x29fc00b8 rm 0xe7aa57b4, rn 0x1584bd74 rs 0x2c07a5b4, carryin 0, cpsr … [all …]
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D | v6intThumb.stdout.exp | 17580 smmla r0, r1, r2, r3 :: rd 0x3fff8000 rm 0x80008000, rn 0x80008000 rs 0x00000000, c:v-in 0, cpsr 0… 17581 smmla r0, r1, r2, r3 :: rd 0x00000000 rm 0x7fff7fff, rn 0x00000000 rs 0x00000000, c:v-in 0, cpsr 0… 17582 smmla r0, r1, r2, r3 :: rd 0x00008000 rm 0x7fff7fff, rn 0x00010001 rs 0x00000001, c:v-in 0, cpsr 0… 17583 smmla r0, r1, r2, r3 :: rd 0x0000001f rm 0x80008000, rn 0xffffffff rs 0x0000001f, c:v-in 0, cpsr 0… 17584 smmla r0, r1, r2, r3 :: rd 0x0000014c rm 0x00640064, rn 0x00030003 rs 0x00000020, c:v-in 0, cpsr 0… 17585 smmla r0, r1, r2, r3 :: rd 0x000000ff rm 0xffffffff, rn 0xfffc0001 rs 0x000000ff, c:v-in 0, cpsr 0… 17586 smmla r0, r1, r2, r3 :: rd 0x000000e5 rm 0xfff70fff, rn 0x00030003 rs 0x00000100, c:v-in 0, cpsr 0… 17587 smmla r0, r1, r2, r3 :: rd 0x6da42730 rm 0xb8035b5b, rn 0xce0ce1ed rs 0x5f986e68, c:v-in 0, cpsr 0… 17588 smmla r0, r1, r2, r3 :: rd 0xaf1e71ac rm 0x35232047, rn 0x146275d8 rs 0xaae3433f, c:v-in 0, cpsr 0… 17589 smmla r0, r1, r2, r3 :: rd 0x29fc00b8 rm 0xe7aa57b4, rn 0x1584bd74 rs 0x2c07a5b4, c:v-in 0, cpsr 0… [all …]
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 681 0x12,0x43,0x51,0xe7 = smmla r1, r2, r3, r4
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D | basic-thumb2-instructions.s.cs | 759 0x52,0xfb,0x03,0x41 = smmla r1, r2, r3, r4
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/external/v8/src/arm/ |
D | assembler-arm.h | 928 void smmla(Register dst, Register src1, Register src2, Register srcA,
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D | macro-assembler-arm.cc | 3820 smmla(result, dividend, ip, dividend); in TruncatingDiv()
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D | assembler-arm.cc | 1705 void Assembler::smmla(Register dst, Register src1, Register src2, Register srcA, in smmla() function in v8::internal::Assembler
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 1718 smmla r1, r2, r3, r4 1723 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x12,0x43,0x51,0xe7]
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D | basic-thumb2-instructions.s | 1968 smmla r1, r2, r3, r4 1974 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x52,0xfb,0x03,0x41]
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 914 __ smmla(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3136 void smmla( 3138 void smmla(Register rd, Register rn, Register rm, Register ra) { in smmla() function 3139 smmla(al, rd, rn, rm, ra); in smmla()
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D | disasm-aarch32.h | 1144 void smmla(
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D | disasm-aarch32.cc | 2689 void Disassembler::smmla( in smmla() function in vixl::aarch32::Disassembler 22310 smmla(CurrentCond(), in DecodeT32() 64874 smmla(condition, in DecodeA32()
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 2491 smmla r1, r2, r3, r4 2496 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x12,0x43,0x51,0xe7]
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D | basic-thumb2-instructions.s | 2403 smmla r1, r2, r3, r4 2409 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x52,0xfb,0x03,0x41]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 1547 # CHECK: smmla r1, r2, r3, r4
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D | thumb2.txt | 1747 # CHECK: smmla r1, r2, r3, r4
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 1886 # CHECK: smmla r1, r2, r3, r4
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D | basic-arm-instructions.txt | 1699 # CHECK: smmla r1, r2, r3, r4
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2398 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
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D | ARMInstrInfo.td | 3582 IIC_iMAC32, "smmla", "\t$Rd, $Rn, $Rm, $Ra",
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2630 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
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D | ARMInstrInfo.td | 3998 IIC_iMAC32, "smmla", "\t$Rd, $Rn, $Rm, $Ra",
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