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Searched refs:smmla (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dmulhi.ll42 ; V6: smmla
48 ; M3-NOT: smmla
/external/llvm/test/CodeGen/ARM/
Dmulhi.ll42 ; V6: smmla
48 ; M3-NOT: smmla
/external/valgrind/none/tests/arm/
Dv6intARM.stdout.exp899 smmla r0, r1, r2, r3 :: rd 0x3fff8000 rm 0x80008000, rn 0x80008000 rs 0x00000000, carryin 0, cpsr …
900 smmla r0, r1, r2, r3 :: rd 0x00000000 rm 0x7fff7fff, rn 0x00000000 rs 0x00000000, carryin 0, cpsr …
901 smmla r0, r1, r2, r3 :: rd 0x00008000 rm 0x7fff7fff, rn 0x00010001 rs 0x00000001, carryin 0, cpsr …
902 smmla r0, r1, r2, r3 :: rd 0x0000001f rm 0x80008000, rn 0xffffffff rs 0x0000001f, carryin 0, cpsr …
903 smmla r0, r1, r2, r3 :: rd 0x0000014c rm 0x00640064, rn 0x00030003 rs 0x00000020, carryin 0, cpsr …
904 smmla r0, r1, r2, r3 :: rd 0x000000ff rm 0xffffffff, rn 0xfffc0001 rs 0x000000ff, carryin 0, cpsr …
905 smmla r0, r1, r2, r3 :: rd 0x000000e5 rm 0xfff70fff, rn 0x00030003 rs 0x00000100, carryin 0, cpsr …
906 smmla r0, r1, r2, r3 :: rd 0x6da42730 rm 0xb8035b5b, rn 0xce0ce1ed rs 0x5f986e68, carryin 0, cpsr …
907 smmla r0, r1, r2, r3 :: rd 0xaf1e71ac rm 0x35232047, rn 0x146275d8 rs 0xaae3433f, carryin 0, cpsr …
908 smmla r0, r1, r2, r3 :: rd 0x29fc00b8 rm 0xe7aa57b4, rn 0x1584bd74 rs 0x2c07a5b4, carryin 0, cpsr …
[all …]
Dv6intThumb.stdout.exp17580 smmla r0, r1, r2, r3 :: rd 0x3fff8000 rm 0x80008000, rn 0x80008000 rs 0x00000000, c:v-in 0, cpsr 0…
17581 smmla r0, r1, r2, r3 :: rd 0x00000000 rm 0x7fff7fff, rn 0x00000000 rs 0x00000000, c:v-in 0, cpsr 0…
17582 smmla r0, r1, r2, r3 :: rd 0x00008000 rm 0x7fff7fff, rn 0x00010001 rs 0x00000001, c:v-in 0, cpsr 0…
17583 smmla r0, r1, r2, r3 :: rd 0x0000001f rm 0x80008000, rn 0xffffffff rs 0x0000001f, c:v-in 0, cpsr 0…
17584 smmla r0, r1, r2, r3 :: rd 0x0000014c rm 0x00640064, rn 0x00030003 rs 0x00000020, c:v-in 0, cpsr 0…
17585 smmla r0, r1, r2, r3 :: rd 0x000000ff rm 0xffffffff, rn 0xfffc0001 rs 0x000000ff, c:v-in 0, cpsr 0…
17586 smmla r0, r1, r2, r3 :: rd 0x000000e5 rm 0xfff70fff, rn 0x00030003 rs 0x00000100, c:v-in 0, cpsr 0…
17587 smmla r0, r1, r2, r3 :: rd 0x6da42730 rm 0xb8035b5b, rn 0xce0ce1ed rs 0x5f986e68, c:v-in 0, cpsr 0…
17588 smmla r0, r1, r2, r3 :: rd 0xaf1e71ac rm 0x35232047, rn 0x146275d8 rs 0xaae3433f, c:v-in 0, cpsr 0…
17589 smmla r0, r1, r2, r3 :: rd 0x29fc00b8 rm 0xe7aa57b4, rn 0x1584bd74 rs 0x2c07a5b4, c:v-in 0, cpsr 0…
[all …]
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs681 0x12,0x43,0x51,0xe7 = smmla r1, r2, r3, r4
Dbasic-thumb2-instructions.s.cs759 0x52,0xfb,0x03,0x41 = smmla r1, r2, r3, r4
/external/v8/src/arm/
Dassembler-arm.h928 void smmla(Register dst, Register src1, Register src2, Register srcA,
Dmacro-assembler-arm.cc3820 smmla(result, dividend, ip, dividend); in TruncatingDiv()
Dassembler-arm.cc1705 void Assembler::smmla(Register dst, Register src1, Register src2, Register srcA, in smmla() function in v8::internal::Assembler
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s1718 smmla r1, r2, r3, r4
1723 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x12,0x43,0x51,0xe7]
Dbasic-thumb2-instructions.s1968 smmla r1, r2, r3, r4
1974 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x52,0xfb,0x03,0x41]
/external/v8/src/compiler/arm/
Dcode-generator-arm.cc914 __ smmla(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local
/external/vixl/src/aarch32/
Dassembler-aarch32.h3136 void smmla(
3138 void smmla(Register rd, Register rn, Register rm, Register ra) { in smmla() function
3139 smmla(al, rd, rn, rm, ra); in smmla()
Ddisasm-aarch32.h1144 void smmla(
Ddisasm-aarch32.cc2689 void Disassembler::smmla( in smmla() function in vixl::aarch32::Disassembler
22310 smmla(CurrentCond(), in DecodeT32()
64874 smmla(condition, in DecodeA32()
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2491 smmla r1, r2, r3, r4
2496 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x12,0x43,0x51,0xe7]
Dbasic-thumb2-instructions.s2403 smmla r1, r2, r3, r4
2409 @ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x52,0xfb,0x03,0x41]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1547 # CHECK: smmla r1, r2, r3, r4
Dthumb2.txt1747 # CHECK: smmla r1, r2, r3, r4
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1886 # CHECK: smmla r1, r2, r3, r4
Dbasic-arm-instructions.txt1699 # CHECK: smmla r1, r2, r3, r4
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td2398 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
DARMInstrInfo.td3582 IIC_iMAC32, "smmla", "\t$Rd, $Rn, $Rm, $Ra",
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2630 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
DARMInstrInfo.td3998 IIC_iMAC32, "smmla", "\t$Rd, $Rn, $Rm, $Ra",

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