Home
last modified time | relevance | path

Searched refs:stencil_mt (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_misc_state.c141 !srb->mt->stencil_mt && in brw_depthbuffer_format()
172 struct intel_mipmap_tree *stencil_mt, in brw_get_depthstencil_tile_masks() argument
199 if (stencil_mt) { in brw_get_depthstencil_tile_masks()
200 if (stencil_mt->stencil_mt) in brw_get_depthstencil_tile_masks()
201 stencil_mt = stencil_mt->stencil_mt; in brw_get_depthstencil_tile_masks()
203 if (stencil_mt->format == MESA_FORMAT_S_UINT8) { in brw_get_depthstencil_tile_masks()
209 intel_get_tile_masks(stencil_mt->tiling, in brw_get_depthstencil_tile_masks()
210 stencil_mt->tr_mode, in brw_get_depthstencil_tile_masks()
211 stencil_mt->cpp, in brw_get_depthstencil_tile_masks()
229 if (irb->mt->stencil_mt) in get_stencil_miptree()
[all …]
Dgen6_depth_state.c42 struct intel_mipmap_tree *stencil_mt, in gen6_emit_depth_stencil_hiz() argument
53 const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt; in gen6_emit_depth_stencil_hiz()
193 if (stencil_mt->array_layout == ALL_SLICES_AT_EACH_LOD) { in gen6_emit_depth_stencil_hiz()
194 if (stencil_mt->format == MESA_FORMAT_S_UINT8) { in gen6_emit_depth_stencil_hiz()
200 stencil_mt->level[lod].level_y * stencil_mt->pitch + in gen6_emit_depth_stencil_hiz()
201 stencil_mt->level[lod].level_x * 64; in gen6_emit_depth_stencil_hiz()
204 stencil_mt, in gen6_emit_depth_stencil_hiz()
205 stencil_mt->level[lod].level_x, in gen6_emit_depth_stencil_hiz()
206 stencil_mt->level[lod].level_y); in gen6_emit_depth_stencil_hiz()
217 OUT_BATCH(2 * stencil_mt->pitch - 1); in gen6_emit_depth_stencil_hiz()
[all …]
Dgen8_depth_state.c43 struct intel_mipmap_tree *stencil_mt, in emit_depth_packets() argument
55 if (!depth_mt && !stencil_mt && brw->no_depth_or_stencil) { in emit_depth_packets()
67 (stencil_mt != NULL && stencil_writable) << 27 | in emit_depth_packets()
103 if (stencil_mt == NULL) { in emit_depth_packets()
129 (2 * stencil_mt->pitch - 1)); in emit_depth_packets()
130 OUT_RELOC64(stencil_mt->bo, in emit_depth_packets()
132 OUT_BATCH(stencil_mt ? stencil_mt->qpitch >> 2 : 0); in emit_depth_packets()
142 brw->no_depth_or_stencil = !depth_mt && !stencil_mt; in emit_depth_packets()
152 struct intel_mipmap_tree *stencil_mt, in gen8_emit_depth_stencil_hiz() argument
164 const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt; in gen8_emit_depth_stencil_hiz()
[all …]
Dgen7_misc_state.c37 struct intel_mipmap_tree *stencil_mt, in gen7_emit_depth_stencil_hiz() argument
50 const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt; in gen7_emit_depth_stencil_hiz()
111 ((stencil_mt != NULL && ctx->Stencil._WriteEnabled) << 27) | in gen7_emit_depth_stencil_hiz()
162 if (stencil_mt == NULL) { in gen7_emit_depth_stencil_hiz()
169 stencil_mt->r8stencil_needs_update = true; in gen7_emit_depth_stencil_hiz()
186 (2 * stencil_mt->pitch - 1)); in gen7_emit_depth_stencil_hiz()
187 OUT_RELOC(stencil_mt->bo, in gen7_emit_depth_stencil_hiz()
Dintel_fbo.c662 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; in intel_validate_framebuffer() local
672 stencil_mt = stencilRb->mt; in intel_validate_framebuffer()
673 if (stencil_mt->stencil_mt) in intel_validate_framebuffer()
674 stencil_mt = stencil_mt->stencil_mt; in intel_validate_framebuffer()
677 if (depth_mt && stencil_mt) { in intel_validate_framebuffer()
684 if (depth_mt->physical_width0 != stencil_mt->physical_width0 || in intel_validate_framebuffer()
685 depth_mt->physical_height0 != stencil_mt->physical_height0 || in intel_validate_framebuffer()
686 depth_mt->physical_depth0 != stencil_mt->physical_depth0 || in intel_validate_framebuffer()
694 if (depth_mt == stencil_mt) { in intel_validate_framebuffer()
714 if (stencil_mt->format != MESA_FORMAT_S_UINT8) { in intel_validate_framebuffer()
[all …]
Dintel_copy_image.c230 assert((src_mt->stencil_mt != NULL) == (dst_mt->stencil_mt != NULL)); in intel_copy_image_sub_data()
232 if (dst_mt->stencil_mt) { in intel_copy_image_sub_data()
233 copy_miptrees(brw, src_mt->stencil_mt, src_x, src_y, src_z, src_level, in intel_copy_image_sub_data()
234 dst_mt->stencil_mt, dst_x, dst_y, dst_z, dst_level, in intel_copy_image_sub_data()
Dintel_mipmap_tree.c471 mt->stencil_mt = intel_miptree_create(brw, in intel_miptree_create_layout()
482 if (!mt->stencil_mt) { in intel_miptree_create_layout()
486 mt->stencil_mt->r8stencil_needs_update = true; in intel_miptree_create_layout()
975 intel_miptree_release(&(*mt)->stencil_mt); in intel_miptree_release()
1052 if (mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT && mt->stencil_mt) in intel_miptree_match_image()
1054 if (mt->format == MESA_FORMAT_Z_FLOAT32 && mt->stencil_mt) in intel_miptree_match_image()
1334 if (dst_mt->stencil_mt) { in intel_miptree_copy_slice_sw()
1335 assert(src_mt->stencil_mt); in intel_miptree_copy_slice_sw()
1336 intel_miptree_copy_slice_sw(brw, dst_mt->stencil_mt, src_mt->stencil_mt, in intel_miptree_copy_slice_sw()
1374 if (src_mt->stencil_mt) { in intel_miptree_copy_slice()
[all …]
Dbrw_context.h686 struct intel_mipmap_tree *stencil_mt,
1163 struct intel_mipmap_tree *stencil_mt; member
1252 struct intel_mipmap_tree *stencil_mt,
1652 struct intel_mipmap_tree *stencil_mt,
1662 struct intel_mipmap_tree *stencil_mt,
1672 struct intel_mipmap_tree *stencil_mt,
1681 struct intel_mipmap_tree *stencil_mt,
Dbrw_clear.c284 if (mt && mt->stencil_mt) in brw_clear()
285 mt->stencil_mt->r8stencil_needs_update = true; in brw_clear()
Dbrw_blorp.c475 if (buffer_bit == GL_STENCIL_BUFFER_BIT && mt->stencil_mt) in find_miptree()
476 mt = mt->stencil_mt; in find_miptree()
697 if (src_mt->stencil_mt) in brw_blorp_copytexsubimage()
698 src_mt = src_mt->stencil_mt; in brw_blorp_copytexsubimage()
699 if (dst_mt->stencil_mt) in brw_blorp_copytexsubimage()
700 dst_mt = dst_mt->stencil_mt; in brw_blorp_copytexsubimage()
Dintel_mipmap_tree.h595 struct intel_mipmap_tree *stencil_mt; member
Dintel_screen.c469 image->has_depthstencil = irb->mt->stencil_mt? true : false; in intel_create_image_from_renderbuffer()
524 image->has_depthstencil = iobj->mt->stencil_mt? true : false; in intel_create_image_from_texture()
Dbrw_wm_surface_state.c604 assert(mt->r8stencil_mt && !mt->stencil_mt->r8stencil_needs_update); in brw_update_texture_surface()
607 mt = mt->stencil_mt; in brw_update_texture_surface()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_fbo.c555 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; in intel_validate_framebuffer() local
565 stencil_mt = stencilRb->mt; in intel_validate_framebuffer()
567 if (depth_mt && stencil_mt) { in intel_validate_framebuffer()
572 if (depth_mt == stencil_mt) { in intel_validate_framebuffer()