/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | atomic-cmp.ll | 8 ; ARM: strexb 12 ; T2: strexb
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/external/llvm/test/CodeGen/ARM/ |
D | atomic-cmp.ll | 8 ; ARM: strexb 12 ; T2: strexb
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D | atomic-cmpxchg.ll | 44 ; CHECK-ARMV6-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0] 71 ; CHECK-ARMV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0] 88 ; CHECK-THUMBV7-NEXT: strexb [[SUCCESS:r[0-9]+]], r2, [r0]
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D | cmpxchg-idioms.ll | 51 ; CHECK: strexb [[STATUS:r[0-9]+]], {{r[0-9]+}}, [r0]
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D | cmpxchg-O0.ll | 16 ; CHECK: strexb [[STATUS:r[0-9]+]], r2, [r0]
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D | ldstrex.ll | 69 ; CHECK: strexb r0, r1, [r2]
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D | atomic-ops-v8.ll | 120 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]] 408 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]] 503 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r0, [r[[ADDR]]] 596 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]] 822 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]] 1051 ; CHECK: strexb [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
D | ldrex-strex.ll | 57 ; ***** Example of strexb ***** 58 ; ASM: strexb r4, r3, [r2]
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/external/llvm/test/MC/ARM/ |
D | thumbv8m.s | 80 strexb r1, r2, [r3] label
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D | basic-arm-instructions.s | 2863 strexb r1, r3, [r4] 2868 @ CHECK: strexb r1, r3, [r4] @ encoding: [0x93,0x1f,0xc4,0xe1]
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D | basic-thumb2-instructions.s | 2906 strexb r5, r1, [r7] 2913 @ CHECK: strexb r5, r1, [r7] @ encoding: [0xc7,0xe8,0x45,0x1f]
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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
D | nacl-atomic-intrinsics.ll | 350 ; ARM32: strexb 628 ; ARM32: strexb 796 ; ARM32: strexb 838 ; ARM32: strexb 1077 ; ARM32: strexb 1247 ; ARM32: strexb 1412 ; ARM32: strexb
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 811 0x93,0x1f,0xc4,0xe1 = strexb r1, r3, [r4]
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D | basic-thumb2-instructions.s.cs | 935 0xc7,0xe8,0x45,0x1f = strexb r5, r1, [r7]
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/external/v8/src/arm/ |
D | assembler-arm.h | 1030 void strexb(Register src1, Register src2, Register dst, Condition cond = al);
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D | assembler-arm.cc | 2155 void Assembler::strexb(Register src1, Register src2, Register dst, in strexb() function in v8::internal::Assembler
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2047 strexb r1, r3, [r4] 2052 @ CHECK: strexb r1, r3, [r4] @ encoding: [0x93,0x1f,0xc4,0xe1]
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D | basic-thumb2-instructions.s | 2429 strexb r5, r1, [r7] 2436 @ CHECK: strexb r5, r1, [r7] @ encoding: [0xc7,0xe8,0x45,0x1f]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3419 void strexb(Condition cond, 3423 void strexb(Register rd, Register rt, const MemOperand& operand) { in strexb() function 3424 strexb(al, rd, rt, operand); in strexb()
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D | disasm-aarch32.h | 1286 void strexb(Condition cond,
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 1789 # CHECK: strexb r1, r3, [r4
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D | thumb2.txt | 1806 # CHECK: strexb r5, r1, [r7]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 1953 # CHECK: strexb r5, r1, [r7]
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D | basic-arm-instructions.txt | 1941 # CHECK: strexb r1, r3, [r4
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 3026 "strexb", "\t$Rd, $Rt, $addr", "", []>;
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