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Searched refs:strexh (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dldrex-strex.ll88 ; ***** Example of strexh *****
89 ; ASM: strexh r4, r3, [r2]
/external/llvm/test/MC/ARM/
Dthumbv8m.s83 strexh r1, r2, [r3] label
Dbasic-arm-instructions.s2864 strexh r4, r2, [r5]
2869 @ CHECK: strexh r4, r2, [r5] @ encoding: [0x92,0x4f,0xe5,0xe1]
Dbasic-thumb2-instructions.s2907 strexh r9, r7, [r12]
2914 @ CHECK: strexh r9, r7, [r12] @ encoding: [0xcc,0xe8,0x59,0x7f]
/external/llvm/test/CodeGen/ARM/
Dcmpxchg-O0.ll35 ; CHECK: strexh [[STATUS:r[0-9]+]], r2, [r0]
Dldstrex.ll78 ; CHECK: strexh r0, r1, [r2]
Datomic-ops-v8.ll47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
239 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
335 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
735 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[OLDX]], [r[[ADDR]]]
848 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
961 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dnacl-atomic-intrinsics.ll391 ; ARM32: strexh
670 ; ARM32: strexh
881 ; ARM32: strexh
923 ; ARM32: strexh
1120 ; ARM32: strexh
1290 ; ARM32: strexh
1450 ; ARM32: strexh
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs812 0x92,0x4f,0xe5,0xe1 = strexh r4, r2, [r5]
Dbasic-thumb2-instructions.s.cs936 0xcc,0xe8,0x59,0x7f = strexh r9, r7, [r12]
/external/v8/src/arm/
Dassembler-arm.h1032 void strexh(Register src1, Register src2, Register dst, Condition cond = al);
Dassembler-arm.cc2171 void Assembler::strexh(Register src1, Register src2, Register dst, in strexh() function in v8::internal::Assembler
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2048 strexh r4, r2, [r5]
2053 @ CHECK: strexh r4, r2, [r5] @ encoding: [0x92,0x4f,0xe5,0xe1]
Dbasic-thumb2-instructions.s2430 strexh r9, r7, [r12]
2437 @ CHECK: strexh r9, r7, [r12] @ encoding: [0xcc,0xe8,0x59,0x7f]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3439 void strexh(Condition cond,
3443 void strexh(Register rd, Register rt, const MemOperand& operand) { in strexh() function
3444 strexh(al, rd, rt, operand); in strexh()
Ddisasm-aarch32.h1297 void strexh(Condition cond,
Ddisasm-aarch32.cc3134 void Disassembler::strexh(Condition cond, in strexh() function in vixl::aarch32::Disassembler
10038 strexh(CurrentCond(), in DecodeT32()
58796 strexh(condition, in DecodeA32()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt1790 # CHECK: strexh r4, r2, [r5
Dthumb2.txt1807 # CHECK: strexh r9, r7, [r12]
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1954 # CHECK: strexh r9, r7, [r12]
Dbasic-arm-instructions.txt1942 # CHECK: strexh r4, r2, [r5
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td3030 "strexh", "\t$Rd, $Rt, $addr", "", []>;
DARMInstrInfo.td4185 NoItinerary, "strexh", "\t$Rd, $Rt, $addr", []>;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td3360 "strexh", "\t$Rd, $Rt, $addr", "",
DARMInstrInfo.td4720 NoItinerary, "strexh", "\t$Rd, $Rt, $addr",

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