| /external/linux-kselftest/tools/testing/selftests/timers/ |
| D | freq-step.c | 90 struct timex txc; in reset_ntp_error() local
92 txc.modes = ADJ_SETOFFSET; in reset_ntp_error()
93 txc.time.tv_sec = 0; in reset_ntp_error()
94 txc.time.tv_usec = 0; in reset_ntp_error()
96 if (adjtimex(&txc) < 0) { in reset_ntp_error()
104 struct timex txc; in set_frequency() local
109 txc.modes = ADJ_TICK | ADJ_FREQUENCY; in set_frequency()
110 txc.tick = 1000000 / user_hz + tick_offset; in set_frequency()
111 txc.freq = (1e6 * freq - user_hz * tick_offset) * (1 << 16); in set_frequency()
113 if (adjtimex(&txc) < 0) { in set_frequency()
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| /external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
| D | nve4_compute.c | 110 PUSH_DATAh(push, screen->txc->offset); in nve4_screen_compute_setup()
111 PUSH_DATA (push, screen->txc->offset); in nve4_screen_compute_setup()
114 PUSH_DATAh(push, screen->txc->offset + 65536); in nve4_screen_compute_setup()
115 PUSH_DATA (push, screen->txc->offset + 65536); in nve4_screen_compute_setup()
197 struct nouveau_bo *txc = nvc0->screen->txc; in gm107_compute_validate_surfaces() local
213 PUSH_DATAh(push, txc->offset + (tic->id * 32)); in gm107_compute_validate_surfaces()
214 PUSH_DATA (push, txc->offset + (tic->id * 32)); in gm107_compute_validate_surfaces()
701 struct nouveau_bo *txc = nvc0->screen->txc; in nve4_compute_validate_textures() local
725 PUSH_DATAh(push, txc->offset + (tic->id * 32)); in nve4_compute_validate_textures()
726 PUSH_DATA (push, txc->offset + (tic->id * 32)); in nve4_compute_validate_textures()
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| D | nvc0_compute.c | 106 PUSH_DATAh(push, screen->txc->offset); in nvc0_screen_compute_setup()
107 PUSH_DATA (push, screen->txc->offset); in nvc0_screen_compute_setup()
112 PUSH_DATAh(push, screen->txc->offset + 65536); in nvc0_screen_compute_setup()
113 PUSH_DATA (push, screen->txc->offset + 65536); in nvc0_screen_compute_setup()
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| D | nvc0_screen.c | 536 nouveau_bo_ref(NULL, &screen->txc); in nvc0_screen_destroy()
1074 &screen->txc); in nvc0_screen_create()
1079 PUSH_DATAh(push, screen->txc->offset); in nvc0_screen_create()
1080 PUSH_DATA (push, screen->txc->offset); in nvc0_screen_create()
1092 PUSH_DATAh(push, screen->txc->offset + 65536); in nvc0_screen_create()
1093 PUSH_DATA (push, screen->txc->offset + 65536); in nvc0_screen_create()
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| D | nvc0_screen.h | 71 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */ member
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| D | nvc0_tex.c | 496 nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->txc, tic->id * 32, in nvc0_validate_tic()
562 nve4_p2mf_push_linear(&nvc0->base, nvc0->screen->txc, tic->id * 32, in nve4_validate_tic()
637 nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->txc, in nvc0_validate_tsc()
679 nve4_p2mf_push_linear(&nvc0->base, nvc0->screen->txc, in nve4_validate_tsc()
1116 nve4_p2mf_push_linear(&nvc0->base, nvc0->screen->txc, tic->id * 32, in gm107_validate_surfaces()
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| D | nvc0_context.c | 444 BCTX_REFN_bo(nvc0->bufctx_3d, 3D_SCREEN, flags, screen->txc); in nvc0_create()
448 BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->txc); in nvc0_create()
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| D | nvc0_state_validate.c | 756 nvc0->base.push_data(&nvc0->base, screen->txc, 65536 + tsc->id * 32, in nvc0_validate_fbread()
771 nvc0->base.push_data(&nvc0->base, screen->txc, tic->id * 32, in nvc0_validate_fbread()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| D | nv50_compute.c | 133 PUSH_DATAh(push, screen->txc->offset); in nv50_screen_compute_setup()
134 PUSH_DATA (push, screen->txc->offset); in nv50_screen_compute_setup()
140 PUSH_DATAh(push, screen->txc->offset + 65536); in nv50_screen_compute_setup()
141 PUSH_DATA (push, screen->txc->offset + 65536); in nv50_screen_compute_setup()
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| D | nv50_tex.c | 243 struct nouveau_bo *txc = nv50->screen->txc; in nv50_validate_tic() local
270 PUSH_DATAh(push, txc->offset); in nv50_validate_tic()
271 PUSH_DATA (push, txc->offset); in nv50_validate_tic()
367 nv50_sifc_linear_u8(&nv50->base, nv50->screen->txc, in nv50_validate_tsc()
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| D | nv50_screen.c | 470 nouveau_bo_ref(NULL, &screen->txc); in nv50_screen_destroy()
682 PUSH_DATAh(push, screen->txc->offset); in nv50_screen_init_hwctx()
683 PUSH_DATA (push, screen->txc->offset); in nv50_screen_init_hwctx()
687 PUSH_DATAh(push, screen->txc->offset + 65536); in nv50_screen_init_hwctx()
688 PUSH_DATA (push, screen->txc->offset + 65536); in nv50_screen_init_hwctx()
1000 &screen->txc); in nv50_screen_create()
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| D | nv50_screen.h | 69 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */ member
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| D | nv50_context.c | 368 BCTX_REFN_bo(nv50->bufctx_3d, 3D_SCREEN, flags, screen->txc); in nv50_create()
372 BCTX_REFN_bo(nv50->bufctx_cp, CP_SCREEN, flags, screen->txc); in nv50_create()
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| /external/mesa3d/src/intel/isl/ |
| D | isl_gen7.c | 221 if (isl_format_get_layout(info->format)->txc == ISL_TXC_ASTC) in isl_gen6_filter_tiling()
225 if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS) in isl_gen6_filter_tiling()
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| D | isl_gen8.c | 196 if (fmtl->txc == ISL_TXC_CCS) { in isl_gen8_choose_image_alignment_el()
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| D | isl_gen9.c | 111 if (fmtl->txc == ISL_TXC_CCS) { in isl_gen9_choose_image_alignment_el()
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| D | gen_format_layout.py | 158 self.txc = line[13].strip().upper() or 'NONE'
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| D | isl.h | 737 enum isl_txc txc; member
1085 return fmtl->txc != ISL_TXC_NONE; in isl_format_is_compressed()
1091 switch (isl_format_get_layout(fmt)->txc) { in isl_format_has_bc_compression()
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| D | isl_format.c | 384 if (fmtl->txc == ISL_TXC_ETC1 || fmtl->txc == ISL_TXC_ETC2) in isl_format_supports_sampling()
391 if (fmtl->txc == ISL_TXC_ASTC) in isl_format_supports_sampling()
410 if (fmtl->txc == ISL_TXC_ETC1 || fmtl->txc == ISL_TXC_ETC2) in isl_format_supports_filtering()
417 if (fmtl->txc == ISL_TXC_ASTC) in isl_format_supports_filtering()
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| D | isl_format_layout.csv | 45 # txc: texture compression
66 …name , bpb, bw, bh, bd, r, g, b, a, l, i, p, space, txc
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| D | isl.c | 268 assert(isl_format_get_layout(info->format)->txc == ISL_TXC_CCS); in isl_surf_choose_tiling()
946 if (ISL_DEV_GEN(dev) >= 9 && fmtl->txc == ISL_TXC_CCS) { in isl_calc_array_pitch_el_rows()
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| /external/mesa3d/src/intel/blorp/ |
| D | blorp_clear.c | 686 assert(aux_fmtl->txc == ISL_TXC_CCS); in blorp_ccs_resolve()
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| /external/mesa3d/src/intel/vulkan/ |
| D | anv_formats.c | 428 if (isl_format_get_layout(linear_fmt.isl_format)->txc == ISL_TXC_ASTC) in anv_physical_device_get_format_properties()
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| D | anv_blorp.c | 135 if (fmtl->txc == ISL_TXC_ASTC) { in get_blorp_surf_for_anv_buffer()
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| /external/lisa/ipynb/residency/scratch/eas13-lowutil-mode/ |
| D | task_residencies_youtube-eas-fbt.ipynb | 237 …\nEMWbM6dd2PxWI2ydPtGhUARpNN1rQ6bMzIVezzLriY7JCCUcp8OPj95vwdEaG/jfr36jxqRh+txc\nDu8TxalAIIS9O9qxb1…
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