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/external/swiftshader/third_party/LLVM/test/Transforms/LoopStrengthReduce/
D2011-10-13-SCEVChain.ll35 %t0 = icmp ugt i32 %n0, -4
39 %t1 = icmp ugt i32 %n1, -4
43 %t2 = icmp ugt i32 %n2, -4
47 %t3 = icmp ugt i32 %n3, -4
51 %t4 = icmp ugt i32 %n4, -4
55 %t5 = icmp ugt i32 %n5, -4
59 %t6 = icmp ugt i32 %n6, -4
63 %t7 = icmp ugt i32 %n7, -4
67 %t8 = icmp ugt i32 %n8, -4
71 %t9 = icmp ugt i32 %n9, -4
[all …]
/external/llvm/test/Transforms/LoopStrengthReduce/
D2011-10-13-SCEVChain.ll35 %t0 = icmp ugt i32 %n0, -4
39 %t1 = icmp ugt i32 %n1, -4
43 %t2 = icmp ugt i32 %n2, -4
47 %t3 = icmp ugt i32 %n3, -4
51 %t4 = icmp ugt i32 %n4, -4
55 %t5 = icmp ugt i32 %n5, -4
59 %t6 = icmp ugt i32 %n6, -4
63 %t7 = icmp ugt i32 %n7, -4
67 %t8 = icmp ugt i32 %n8, -4
71 %t9 = icmp ugt i32 %n9, -4
[all …]
/external/llvm/test/Transforms/InstCombine/
Dcompare-udiv.ll4 ; CHECK: %cmp1 = icmp ugt i32 %d, %n
12 ; CHECK: %cmp1 = icmp ugt i32 %d, 64
47 %cmp1 = icmp ugt i32 %div, 0
51 ; (icmp ugt (udiv C1, X), C1) -> false.
56 %cmp1 = icmp ugt i32 %div, 8
64 %cmp1 = icmp ugt i32 %div, 3
72 %cmp1 = icmp ugt i32 %div, 2
80 %cmp1 = icmp ugt i32 %div, 1
85 ; CHECK: %cmp1 = icmp ugt i32 %d, 4
93 ; CHECK: %cmp1 = icmp ugt i32 %d, 2
[all …]
D2008-01-21-MismatchedCastAndCompare.ll9 ; CHECK: %c = icmp ugt i8 %A, %B
16 %c = icmp ugt i32 %a, %b
18 ; CHECK: %c = icmp ugt i8 %A, %B
Dselect-implied.ll12 %cmp2 = icmp ugt i32 %a, %b
44 %cmp1 = icmp ugt i32 %a, 10
48 %cmp2 = icmp ugt i32 %a, 10
109 %cmp1 = icmp ugt i32 %a, 10
113 %cmp2 = icmp ugt i32 %a, 9
Doverflow.ll15 %0 = icmp ugt i64 %add.off, 4294967295
43 %0 = icmp ugt i64 %add.off, 4294967295
67 %0 = icmp ugt i64 %add.off, 4294967295
87 %cmp = icmp ugt i32 %add4, 255
112 %0 = icmp ugt i64 %add.off, 4294967295
D2008-08-05-And.ll12 %c1 = icmp ugt i8 %s1, 2
14 %c2 = icmp ugt i8 %s2, 2
D2004-11-27-SetCCForCastLargerAndConstant.ll162 %C = icmp ugt i32 %Y, 1024
186 ; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %SB, 17
190 %C = icmp ugt i32 %Y, 17
219 %C = icmp ugt i32 %Y, 1024
243 ; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %SB, 17
247 %C = icmp ugt i32 %Y, 17
253 ; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %SB, 17
/external/llvm/test/CodeGen/AArch64/
Dcond-sel.ll10 %tst1 = icmp ugt i32 %lhs32, %rhs32
61 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
62 %tst1 = icmp ugt i32 %lhs32, %rhs32
77 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
79 %tst3 = icmp ugt i64 %lhs64, %rhs3
101 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
102 %tst1 = icmp ugt i32 %lhs32, %rhs32
117 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
119 %tst3 = icmp ugt i64 %lhs64, %rhs3
141 %tst1 = icmp ugt i32 %lhs32, %rhs32
[all …]
Darm64-addr-mode-folding.ll24 %cmp7 = icmp ugt i8 %1, %2
41 %cmp21 = icmp ugt i8 %3, %4
58 %cmp37 = icmp ugt i8 %5, %6
84 %cmp7 = icmp ugt i8 %1, %2
101 %cmp21 = icmp ugt i8 %3, %4
118 %cmp37 = icmp ugt i8 %5, %6
/external/swiftshader/third_party/subzero/tests_lit/reader_tests/
Dcompare.ll13 %vugt = icmp ugt i1 %a1, %a2
30 ; CHECK-NEXT: %vugt = icmp ugt i1 %a1, %a2
47 %vugt = icmp ugt i8 %a1, %a2
64 ; CHECK-NEXT: %vugt = icmp ugt i8 %a1, %a2
81 %vugt = icmp ugt i16 %a1, %a2
98 ; CHECK-NEXT: %vugt = icmp ugt i16 %a1, %a2
113 %vugt = icmp ugt i32 %a1, %a2
128 ; CHECK-NEXT: %vugt = icmp ugt i32 %a1, %a2
143 %vugt = icmp ugt i64 %a1, %a2
158 ; CHECK-NEXT: %vugt = icmp ugt i64 %a1, %a2
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dselect64.ll12 %0 = icmp ugt i32 %cond, 5
22 %cmp = icmp ugt i32 %cond, 5
33 %cmp = icmp ugt i32 %cond, 5
44 %cmp = icmp ugt i32 %cond, 5
58 %cmp = icmp ugt i32 %cond, 5
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
D2008-01-21-MismatchedCastAndCompare.ll9 ; CHECK: %c = icmp ugt i8 %A, %B
16 %c = icmp ugt i32 %a, %b
18 ; CHECK: %c = icmp ugt i8 %A, %B
Dicmp.ll92 %b = icmp ugt i32 %x, %a
95 ; CHECK: icmp ugt i32 %x, 1
201 ; CHECK: icmp ugt
203 %B = icmp ugt i8 %A, 3
250 ; CHECK: %c = icmp ugt i32 %x, %y
255 %c = icmp ugt i32 %lhs, %rhs
272 ; CHECK: %c = icmp ugt i32 %x, %y
277 %c = icmp ugt i32 %lhs, %rhs
297 %c = icmp ugt i32 %lhs, %x
316 %c = icmp ugt i32 %x, %rhs
[all …]
D2004-11-27-SetCCForCastLargerAndConstant.ll105 %C = icmp ugt i32 %Y, 1024 ; <i1> [#uses=1]
127 %C = icmp ugt i32 %Y, 17
129 ; CHECK: %C = icmp ugt i8 %SB, 17
151 %C = icmp ugt i32 %Y, 1024 ; <i1> [#uses=1]
172 %C = icmp ugt i32 %Y, 17 ; <i1> [#uses=1]
174 ; CHECK: %C = icmp ugt i8 %SB, 17
182 ; CHECK: %C = icmp ugt i8 %SB, 17
Doverflow.ll15 %0 = icmp ugt i64 %add.off, 4294967295
43 %0 = icmp ugt i64 %add.off, 4294967295
67 %0 = icmp ugt i64 %add.off, 4294967295
87 %cmp = icmp ugt i32 %add4, 255
128 %cmp = icmp ugt i64 %b, %add
D2008-08-05-And.ll12 %c1 = icmp ugt i8 %s1, 2
14 %c2 = icmp ugt i8 %s2, 2
/external/llvm/test/Transforms/IndVarSimplify/
Dbackedge-on-min-max.ll271 %in.bounds = icmp ugt i32 %a_len, %idx
327 %in.bounds = icmp ugt i32 42, %idx
347 %umax.cmp = icmp ugt i32 %a_len, %n
349 %entry.cond = icmp ugt i32 5, %umax
355 %in.bounds = icmp ugt i32 %idx, %a_len
365 %be.cond = icmp ugt i32 %idx.inc, %umax
375 %umax.cmp = icmp ugt i32 %a_len, %n
377 %entry.cond = icmp ugt i32 5, %umax
393 %be.cond = icmp ugt i32 %idx.inc, %umax
403 %umax.cmp = icmp ugt i32 42, %n
[all …]
Dpr24356.ll17 ; CHECK: %tmp9 = icmp ugt i8 %b.03, 1
18 ; CHECK-NOT: %tmp9 = icmp ugt i8 0, 1
20 %tmp9 = icmp ugt i8 %b.03, 1
/external/llvm/test/CodeGen/SystemZ/
Dint-cmp-23.ll13 %cond = icmp ugt i16 %val, 1
40 %cond = icmp ugt i16 %val, 1
55 %cond = icmp ugt i16 %val, 1
70 %cond = icmp ugt i16 %val, 1
86 %cond = icmp ugt i16 %val, 1
Dint-cmp-33.ll14 %cond = icmp ugt i32 %val, 1
90 %cond = icmp ugt i32 %val, 1
105 %cond = icmp ugt i32 %val, 1
120 %cond = icmp ugt i32 %val, 1
136 %cond = icmp ugt i32 %val, 1
/external/llvm/test/Transforms/SimplifyCFG/
Dimplied-cond-matching-imm.ll32 %cmp1 = icmp ugt i32 %a, 5
36 %cmp2 = icmp ugt i32 %a, 6
56 %cmp1 = icmp ugt i32 %a, 1
84 %cmp2 = icmp ugt i32 %a, 0
/external/llvm/test/CodeGen/NVPTX/
Dreg-copy.ll28 %7 = fcmp ugt float %6, 0x7FF0000000000000
33 %9 = fcmp ugt float %8, 0x7FF0000000000000
56 %24 = fcmp ugt float %23, 0x7FF0000000000000
68 %29 = fcmp ugt float %28, 0x7FF0000000000000
102 %47 = fcmp ugt float %46, 0x7FF0000000000000
114 %52 = fcmp ugt float %51, 0x7FF0000000000000
148 %65 = fcmp ugt float %64, 0x7FF0000000000000
160 %70 = fcmp ugt float %69, 0x7FF0000000000000
171 %74 = fcmp ugt float %33, 0x7FF0000000000000
182 %78 = fcmp ugt float %.pre6.i, 0x7FF0000000000000
/external/llvm/test/CodeGen/X86/
Davx512-mask-spills.ll23 %cmp_res = icmp ugt <4 x i32> %a, %b
48 %cmp_res = icmp ugt <8 x i32> %a, %b
72 %cmp_res = icmp ugt <16 x i32> %a, %b
96 %cmp_res = icmp ugt <32 x i16> %a, %b
121 %cmp_res = icmp ugt <64 x i8> %a, %b
/external/llvm/test/Transforms/InstSimplify/
DAndOrXor.ll91 %cmp3 = icmp ugt i32 %b, 2
102 %cmp3 = icmp ugt i32 %b, 2
134 %2 = icmp ugt i32 %1, 3
167 %2 = icmp ugt i32 %1, 3
262 %cmp1 = icmp ugt i32 %i, 4
290 %cmp1 = icmp ugt i3 %i, 1
333 ; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i16> %j, <i16 1, i16 1>
340 %cmp1 = icmp ugt <2 x i16> %j, <i16 1, i16 1>

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