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Searched refs:uniform_bo (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_compute.c119 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); in nvc0_screen_compute_setup()
120 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); in nvc0_screen_compute_setup()
200 struct nouveau_bo *bo = nvc0->screen->uniform_bo; in nvc0_compute_validate_constbufs()
257 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); in nvc0_compute_validate_driverconst()
258 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); in nvc0_compute_validate_driverconst()
275 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_compute_validate_buffers()
276 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_compute_validate_buffers()
392 struct nouveau_bo *bo = screen->uniform_bo; in nvc0_compute_upload_input()
411 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); in nvc0_compute_upload_input()
412 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5)); in nvc0_compute_upload_input()
Dnve4_compute.c138 address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5); in nve4_screen_compute_setup()
236 address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); in gm107_compute_validate_surfaces()
264 address = nvc0->screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); in nve4_compute_validate_surfaces()
338 address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); in nve4_compute_set_tex_handles()
368 struct nouveau_bo *bo = nvc0->screen->uniform_bo; in nve4_compute_validate_constbufs()
389 = nvc0->screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); in nve4_compute_validate_constbufs()
425 address = nvc0->screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); in nve4_compute_validate_buffers()
494 address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5); in nve4_compute_upload_input()
498 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5)); in nve4_compute_upload_input()
499 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5)); in nve4_compute_upload_input()
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Dnvc0_state_validate.c203 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); in nvc0_validate_fb()
204 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); in nvc0_validate_fb()
378 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_upload_uclip_planes()
379 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_upload_uclip_planes()
485 struct nouveau_bo *bo = nvc0->screen->uniform_bo; in nvc0_constbufs_validate()
548 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_validate_buffers()
549 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_validate_buffers()
627 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); in nvc0_validate_driverconst()
628 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); in nvc0_validate_driverconst()
778 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(4)); in nvc0_validate_fbread()
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Dnvc0_screen.c534 nouveau_bo_ref(NULL, &screen->uniform_bo); in nvc0_screen_destroy()
1008 &screen->uniform_bo); in nvc0_screen_create()
1012 PUSH_REFN (push, screen->uniform_bo, NV_VRAM_DOMAIN(&screen->base) | NOUVEAU_BO_WR); in nvc0_screen_create()
1017 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_RUNOUT_INFO); in nvc0_screen_create()
1018 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_RUNOUT_INFO); in nvc0_screen_create()
1026 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_RUNOUT_INFO); in nvc0_screen_create()
1027 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_RUNOUT_INFO); in nvc0_screen_create()
1189 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); in nvc0_screen_create()
1190 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(i)); in nvc0_screen_create()
Dnvc0_tex.c742 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nve4_set_tex_handles()
743 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nve4_set_tex_handles()
1075 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_validate_suf()
1076 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nvc0_validate_suf()
1136 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(stage)); in gm107_validate_surfaces()
1137 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(stage)); in gm107_validate_surfaces()
1159 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nve4_update_surface_bindings()
1160 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s)); in nve4_update_surface_bindings()
Dnvc0_screen.h69 struct nouveau_bo *uniform_bo; member
Dnvc0_vbo.c839 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); in nvc0_draw_indirect()
840 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); in nvc0_draw_indirect()
983 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); in nvc0_draw_vbo()
984 PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(0)); in nvc0_draw_vbo()
Dnvc0_context.c443 BCTX_REFN_bo(nvc0->bufctx_3d, 3D_SCREEN, flags, screen->uniform_bo); in nvc0_create()
447 BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->uniform_bo); in nvc0_create()
Dnvc0_query_hw_sm.c2504 address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s); in nvc0_hw_sm_upload_input()