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Searched refs:uxtah (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s21 uxtah r0, r0, r0 label
31 @ CHECK-7EM: uxtah r0, r0, r0 @ encoding: [0x10,0xfa,0x80,0xf0]
Dbasic-arm-instructions.s3469 uxtah r1, r3, r9
3471 uxtah r3, r8, r3, ror #8
3473 uxtah r9, r3, r3, ror #24
3475 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x79,0x10,0xf3,0xe6]
3477 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x73,0x34,0xf8,0xe6]
3479 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x73,0x9c,0xf3,0xe6]
Dbasic-thumb2-instructions.s3613 uxtah r1, r3, r9
3616 uxtah r3, r8, r3, ror #8
3619 uxtah r9, r3, r3, ror #24
3621 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x13,0xfa,0x89,0xf1]
3624 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x18,0xfa,0x93,0xf3]
3627 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x13,0xfa,0xb3,0xf9]
/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt56 # CHECK: uxtah
Dthumb2.txt2614 # CHECK: uxtah r1, r3, r9
2617 # CHECK: uxtah r3, r8, r3, ror #8
2620 # CHECK: uxtah r9, r3, r3, ror #24
Dbasic-arm-instructions.txt2461 # CHECK: uxtah r1, r3, r9
2463 # CHECK: uxtah r3, r8, r3, ror #8
2465 # CHECK: uxtah r9, r3, r3, ror #24
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxt_rot.ll50 ; A8: uxtah r0, r0, r1, ror #8
/external/valgrind/none/tests/arm/
Dv6media.stdout.exp3289 uxtah r0, r1, r2, ROR #24 :: rd 0x3141724e rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
3290 uxtah r0, r1, r2, ROR #16 :: rd 0x3141803f rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
3291 uxtah r0, r1, r2, ROR #8 :: rd 0x3141714f rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
3292 uxtah r0, r1, r2, ROR #0 :: rd 0x31418140 rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
3293 uxtah r0, r1, r2, ROR #24 :: rd 0x3141724e rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
3294 uxtah r0, r1, r2, ROR #16 :: rd 0x3141803f rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
3295 uxtah r0, r1, r2, ROR #8 :: rd 0x314171bf rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
3296 uxtah r0, r1, r2, ROR #0 :: rd 0x3141f140 rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
3297 uxtah r0, r1, r2, ROR #24 :: rd 0xf7b1709c rm 0xf7b0b13e, rn 0x5e4b1cbf, carryin 0, cpsr 0x00000000…
3298 uxtah r0, r1, r2, ROR #24 :: rd 0x44df28ef rm 0x44de5ca9, rn 0x464a21cc, carryin 0, cpsr 0x00000000…
[all …]
Dv6intARM.stdout.exp770 uxtah r0, r1, r2, ROR #24 :: rd 0x3141724e rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
771 uxtah r0, r1, r2, ROR #16 :: rd 0x3141803f rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
772 uxtah r0, r1, r2, ROR #8 :: rd 0x3141714f rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
773 uxtah r0, r1, r2, ROR #0 :: rd 0x31418140 rm 0x31415927, rn 0x27182819, carryin 0, cpsr 0x00000000…
774 uxtah r0, r1, r2, ROR #24 :: rd 0x3141724e rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
775 uxtah r0, r1, r2, ROR #16 :: rd 0x3141803f rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
776 uxtah r0, r1, r2, ROR #8 :: rd 0x314171bf rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
777 uxtah r0, r1, r2, ROR #0 :: rd 0x3141f140 rm 0x31415927, rn 0x27189819, carryin 0, cpsr 0x00000000…
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs966 0x79,0x10,0xf3,0xe6 = uxtah r1, r3, r9
968 0x73,0x34,0xf8,0xe6 = uxtah r3, r8, r3, ror #8
970 0x73,0x9c,0xf3,0xe6 = uxtah r9, r3, r3, ror #24
Dbasic-thumb2-instructions.s.cs1169 0x13,0xfa,0x89,0xf1 = uxtah r1, r3, r9
1172 0x18,0xfa,0x93,0xf3 = uxtah r3, r8, r3, ror #8
1175 0x13,0xfa,0xb3,0xf9 = uxtah r9, r3, r3, ror #24
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2551 uxtah r1, r3, r9
2553 uxtah r3, r8, r3, ror #8
2555 uxtah r9, r3, r3, ror #24
2557 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x79,0x10,0xf3,0xe6]
2559 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x73,0x34,0xf8,0xe6]
2561 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x73,0x9c,0xf3,0xe6]
Dbasic-thumb2-instructions.s3116 uxtah r1, r3, r9
3119 uxtah r3, r8, r3, ror #8
3122 uxtah r9, r3, r3, ror #24
3124 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x13,0xfa,0x89,0xf1]
3127 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x18,0xfa,0x93,0xf3]
3130 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x13,0xfa,0xb3,0xf9]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt2288 # CHECK: uxtah r1, r3, r9
2290 # CHECK: uxtah r3, r8, r3, ror #8
2292 # CHECK: uxtah r9, r3, r3, ror #24
Dthumb2.txt2463 # CHECK: uxtah r1, r3, r9
2466 # CHECK: uxtah r3, r8, r3, ror #8
2469 # CHECK: uxtah r9, r3, r3, ror #24
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-operand-rm-a32.cc77 M(uxtah) \
Dtest-assembler-cond-rd-rn-operand-rm-t32.cc77 M(uxtah) \
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc57 M(uxtah)
Dtest-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc57 M(uxtah)
/external/v8/src/arm/
Dassembler-arm.h999 void uxtah(Register dst, Register src1, Register src2, int rotate = 0,
/external/v8/src/compiler/arm/
Dcode-generator-arm.cc1008 __ uxtah(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local
/external/vixl/src/aarch32/
Dassembler-aarch32.h3718 void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
3719 void uxtah(Register rd, Register rn, const Operand& operand) { in uxtah() function
3720 uxtah(al, rd, rn, operand); in uxtah()
Ddisasm-aarch32.h1433 void uxtah(Condition cond, Register rd, Register rn, const Operand& operand);
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td1816 def t2UXTAH : T2I_exta_rrot<0b001, "uxtah",
3989 def : t2InstAlias<"uxtah${p} $Rd, $Rn, $Rm",
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2016 def t2UXTAH : T2I_exta_rrot<0b001, "uxtah",
4696 def : InstAlias<"uxtah${p} $Rd, $Rn, $Rm",

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