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Searched refs:v2f64 (Results 1 – 25 of 205) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
D	arm64-vfloatintrinsics.ll	`253 %v2f64 = type <2 x double> 255 define %v2f64 @test_v2f64.sqrt(%v2f64 %a) { 257 %1 = call %v2f64 @llvm.sqrt.v2f64(%v2f64 %a) 258 ret %v2f64 %1 261 define %v2f64 @test_v2f64.powi(%v2f64 %a, i32 %b) { 263 %1 = call %v2f64 @llvm.powi.v2f64(%v2f64 %a, i32 %b) 264 ret %v2f64 %1 267 define %v2f64 @test_v2f64.sin(%v2f64 %a) { 269 %1 = call %v2f64 @llvm.sin.v2f64(%v2f64 %a) 270 ret %v2f64 %1 [all …]`
D	arm64-vcvt.ll	26 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtas.v2i64.v2f64(<2 x double> %A) 32 declare <2 x i64> @llvm.aarch64.neon.fcvtas.v2i64.v2f64(<2 x double>) nounwind readnone 57 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtau.v2i64.v2f64(<2 x double> %A) 63 declare <2 x i64> @llvm.aarch64.neon.fcvtau.v2i64.v2f64(<2 x double>) nounwind readnone 88 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double> %A) 94 declare <2 x i64> @llvm.aarch64.neon.fcvtms.v2i64.v2f64(<2 x double>) nounwind readnone 119 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double> %A) 125 declare <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double>) nounwind readnone 150 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double> %A) 156 declare <2 x i64> @llvm.aarch64.neon.fcvtps.v2i64.v2f64(<2 x double>) nounwind readnone [all …]
D	arm64-fminv.ll	20 %min = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> %in) 26 declare double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double>) 45 %max = call double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double> %in) 51 declare double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double>) 70 %minnm = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in) 76 declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>) 95 %maxnm = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) 101 declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>)
D	arm64-vminmaxnm.ll	20 …%vmaxnm2.i = tail call <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double> %a, <2 x double> … 41 …%vminnm2.i = tail call <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double> %a, <2 x double> … 59 declare <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double>, <2 x double>) nounwind readnone 62 declare <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double>, <2 x double>) nounwind readnone 71 %max = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) 78 %min = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in) 82 declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>) 83 declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>)
D	sincospow-vector-expansion.ll	`8 %1 = call <2 x double> @llvm.cos.v2f64(<2 x double> %v1) 17 %1 = call <2 x double> @llvm.sin.v2f64(<2 x double> %v1) 26 %1 = call <2 x double> @llvm.pow.v2f64(<2 x double> %v1, <2 x double> %v2) 31 declare <2 x double> @llvm.cos.v2f64(<2 x double>) 32 declare <2 x double> @llvm.sin.v2f64(<2 x double>) 33 declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)`
/external/llvm/test/CodeGen/ARM/
D	vfloatintrinsics.ll	`255 %v2f64 = type <2 x double> 257 define %v2f64 @test_v2f64.sqrt(%v2f64 %a) { 259 %1 = call %v2f64 @llvm.sqrt.v2f64(%v2f64 %a) 260 ret %v2f64 %1 263 define %v2f64 @test_v2f64.powi(%v2f64 %a, i32 %b) { 265 %1 = call %v2f64 @llvm.powi.v2f64(%v2f64 %a, i32 %b) 266 ret %v2f64 %1 269 define %v2f64 @test_v2f64.sin(%v2f64 %a) { 271 %1 = call %v2f64 @llvm.sin.v2f64(%v2f64 %a) 272 ret %v2f64 %1 [all …]`
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
D	ARMCallingConv.td	30 // Handle all vector types as either f64 or v2f64. 32 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>, 34 // f64 and v2f64 are passed in adjacent GPRs, possibly split onto the stack 35 CCIfType<[f64, v2f64], CCCustom<"CC_ARM_APCS_Custom_f64">>, 42 CCIfType<[v2f64], CCAssignToStack<16, 4>> 48 // Handle all vector types as either f64 or v2f64. 50 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>, 52 CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_APCS_Custom_f64">>, 62 // Handle all vector types as either f64 or v2f64. 64 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>, [all …]
/external/llvm/lib/Target/ARM/
D	ARMCallingConv.td	32 // Handle all vector types as either f64 or v2f64. 34 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>, 36 // f64 and v2f64 are passed in adjacent GPRs, possibly split onto the stack 37 CCIfType<[f64, v2f64], CCCustom<"CC_ARM_APCS_Custom_f64">>, 44 CCIfType<[v2f64], CCAssignToStack<16, 4>> 57 // Handle all vector types as either f64 or v2f64. 59 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>, 61 CCIfType<[f64, v2f64], CCCustom<"RetCC_ARM_APCS_Custom_f64">>, 71 // Handle all vector types as either f64 or v2f64. 73 CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>, [all …]
D	ARMTargetTransformInfo.cpp	83 { ISD::FP_ROUND, MVT::v2f64, 2 }, in getCastInstrCost() 161 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost() 162 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost() 164 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 165 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 166 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 }, in getCastInstrCost() 167 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 }, in getCastInstrCost() 168 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost() 169 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost() 171 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost() [all …]
/external/llvm/test/CodeGen/SystemZ/
D	vec-round-01.ll	1 ; Test v2f64 rounding. 11 declare <2 x double> @llvm.rint.v2f64(<2 x double>) 12 declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>) 13 declare <2 x double> @llvm.floor.v2f64(<2 x double>) 14 declare <2 x double> @llvm.ceil.v2f64(<2 x double>) 15 declare <2 x double> @llvm.trunc.v2f64(<2 x double>) 16 declare <2 x double> @llvm.round.v2f64(<2 x double>) 22 %res = call <2 x double> @llvm.rint.v2f64(<2 x double> %val) 30 %res = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %val) 38 %res = call <2 x double> @llvm.floor.v2f64(<2 x double> %val) [all …]
D	vec-mul-02.ll	`5 declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) 40 ; Test a v2f64 multiply-and-add. 46 %ret = call <2 x double> @llvm.fma.v2f64 (<2 x double> %val1, 52 ; Test a v2f64 multiply-and-subtract. 59 %ret = call <2 x double> @llvm.fma.v2f64 (<2 x double> %val1,`
D	vec-log-01.ll	`1 ; Test v2f64 logarithm. 5 declare <2 x double> @llvm.log.v2f64(<2 x double>) 13 %ret = call <2 x double> @llvm.log.v2f64(<2 x double> %val)`
D	vec-abs-05.ll	`1 ; Test f64 and v2f64 absolute. 6 declare <2 x double> @llvm.fabs.v2f64(<2 x double>) 13 %ret = call <2 x double> @llvm.fabs.v2f64(<2 x double> %val) 22 %abs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %val)`
D	vec-sqrt-01.ll	`1 ; Test f64 and v2f64 square root. 6 declare <2 x double> @llvm.sqrt.v2f64(<2 x double>) 12 %ret = call <2 x double> @llvm.sqrt.v2f64(<2 x double> %val)`
/external/llvm/test/Transforms/InstCombine/
D	masked_intrinsics.ll	3 declare <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptrs, i32, <2 x i1> %mask, <2 x… 4 declare void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %val, <2 x double>* %ptrs, i32, <2 x i1>… 5 declare <2 x double> @llvm.masked.gather.v2f64(<2 x double> %ptrs, i32, <2 x i1> %mask, <2 x doubl… 6 declare void @llvm.masked.scatter.v2f64(<2 x double> %val, <2 x double> %ptrs, i32, <2 x i1> %mask) 9 …%res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptr, i32 1, <2 x i1> zeroi… 17 …%res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptr, i32 2, <2 x i1> <i1 1… 26 …%res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %ptr, i32 2, <2 x i1> <i1 1… 35 …call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %val, <2 x double>* %ptr, i32 3, <2 x i1> … 43 …call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %val, <2 x double>* %ptr, i32 4, <2 x i1> … 52 …%res = call <2 x double> @llvm.masked.gather.v2f64(<2 x double*> %ptrs, i32 5, <2 x i1> zeroinitia… [all …]
/external/llvm/lib/Target/PowerPC/
D	PPCInstrVSX.td	52 SDTCisVT<0, v2f64>, SDTCisPtrTy<1> 55 SDTCisVT<0, v2f64>, SDTCisPtrTy<1> 111 [(set v2f64:$XT, (int_ppc_vsx_lxvd2x xoaddr:$src))]>; 133 [(store v2f64:$XT, xoaddr:$dst)]>; 156 [(set v2f64:$XT, (fadd v2f64:$XA, v2f64:$XB))]>; 166 [(set v2f64:$XT, (fmul v2f64:$XA, v2f64:$XB))]>; 183 [(set v2f64:$XT, (fsub v2f64:$XA, v2f64:$XB))]>; 259 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi))]>, 291 [(set v2f64:$XT, (fma v2f64:$XA, v2f64:$XB, (fneg v2f64:$XTi)))]>, 323 [(set v2f64:$XT, (fneg (fma v2f64:$XA, v2f64:$XB, v2f64:$XTi)))]>, [all …]
/external/llvm/test/CodeGen/Mips/msa/
D	basic_operations_float.ll	9 @v2f64 = global <2 x double> <double 0.0, double 0.0> 53 store volatile <2 x double> <double 0.0, double 0.0>, <2 x double>@v2f64 56 …volatile <2 x double> <double 72340172838076673.0, double 72340172838076673.0>, <2 x double>@v2f64 62 …ore volatile <2 x double> <double 281479271743489.0, double 281479271743489.0>, <2 x double>@v2f64 68 store volatile <2 x double> <double 4294967297.0, double 4294967297.0>, <2 x double>@v2f64 74 store volatile <2 x double> <double 1.0, double 1.0>, <2 x double>@v2f64 80 store volatile <2 x double> <double 1.0, double 31.0>, <2 x double>@v2f64 86 store volatile <2 x double> <double 3.0, double 4.0>, <2 x double>@v2f64 116 store volatile <2 x double> %3, <2 x double>@v2f64 201 %1 = load <2 x double>, <2 x double>* @v2f64 [all …]
/external/llvm/lib/Target/AArch64/
D	AArch64TargetTransformInfo.cpp	217 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost() 220 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost() 247 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 248 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 }, in getCastInstrCost() 249 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost() 250 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, in getCastInstrCost() 251 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 }, in getCastInstrCost() 252 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 }, in getCastInstrCost() 258 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost() 261 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost() [all …]
D	AArch64CallingConvention.td	27 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>, 33 CCIfBigEndian<CCIfType<[v2i64, v2f64, v4i32, v4f32, v8i16, v8f16, v16i8], 53 // Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers, 76 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16], 84 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16], 90 CCIfType<[v2f64, v4f32], CCBitConvertToType<v2i64>>, 98 CCIfBigEndian<CCIfType<[v2i64, v2f64, v4i32, v4f32, v8i16, v8f16, v16i8], 114 CCIfType<[f128, v2i64, v4i32, v8i16, v16i8, v4f32, v2f64, v8f16], 125 CCIfType<[v2f64, v4f32, f128], CCBitConvertToType<v2i64>>, 142 // Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers, [all …]
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
D	CellSDKIntrinsics.td	`412 [(set (v2f64 VECREG:$rT), (int_spu_si_dfa (v2f64 VECREG:$rA), 413 (v2f64 VECREG:$rB)))]>; 418 [(set (v2f64 VECREG:$rT), (int_spu_si_dfs (v2f64 VECREG:$rA), 419 (v2f64 VECREG:$rB)))]>; 424 [(set (v2f64 VECREG:$rT), (int_spu_si_dfm (v2f64 VECREG:$rA), 425 (v2f64 VECREG:$rB)))]>; 430 [(set (v2f64 VECREG:$rT), (int_spu_si_dfma (v2f64 VECREG:$rA), 431 (v2f64 VECREG:$rB)))]>; 436 [(set (v2f64 VECREG:$rT), (int_spu_si_dfnma (v2f64 VECREG:$rA), 437 (v2f64 VECREG:$rB)))]>; [all …]`
/external/swiftshader/third_party/LLVM/lib/Target/X86/
D	X86GenDAGISel.inc	60 /94/ OPC_CheckChild1Type, MVT::v2f64, 70 …// Src: (st VR128:v2f64:$src, addr:iPTR:$dst)<<P:Predicate_alignednontemporalstore>> - Complexity … 71 // Dst: (VMOVNTPDmr addr:iPTR:$dst, VR128:v2f64:$src) 75 …// Src: (st VR128:v2f64:$src, addr:iPTR:$dst)<<P:Predicate_alignednontemporalstore>> - Complexity … 76 // Dst: (VMOVNTDQ_64mr addr:iPTR:$dst, VR128:v2f64:$src) 85 …// Src: (st VR128:v2f64:$src, addr:iPTR:$dst)<<P:Predicate_alignednontemporalstore>> - Complexity … 86 // Dst: (MOVNTPDmr addr:iPTR:$dst, VR128:v2f64:$src) 90 …// Src: (st VR128:v2f64:$src, addr:iPTR:$dst)<<P:Predicate_alignednontemporalstore>> - Complexity … 91 // Dst: (MOVNTDQ_64mr addr:iPTR:$dst, VR128:v2f64:$src) 3829 /SwitchType/ 56, MVT::v2f64,// ->8546 [all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/useful-harnesses/
D	vecoperations.c	`8 typedef double v2f64 __attribute__((ext_vector_type(2))); typedef 62 void print_v2f64(const char *str, v2f64 v) { in print_v2f64() 131 v2f64 v2f64_shuffle(v2f64 a) { in v2f64_shuffle() 132 v2f64 c2 = a.yx; in v2f64_shuffle() 148 v2f64 v4 = { 5.8e56, 9.103e-62 }; in main()`
/external/llvm/test/CodeGen/PowerPC/
D	vec_rounding.ll	`9 declare <2 x double> @llvm.floor.v2f64(<2 x double> %p) 12 %t = call <2 x double> @llvm.floor.v2f64(<2 x double> %p) 31 declare <2 x double> @llvm.ceil.v2f64(<2 x double> %p) 34 %t = call <2 x double> @llvm.ceil.v2f64(<2 x double> %p) 53 declare <2 x double> @llvm.trunc.v2f64(<2 x double> %p) 56 %t = call <2 x double> @llvm.trunc.v2f64(<2 x double> %p) 75 declare <2 x double> @llvm.nearbyint.v2f64(<2 x double> %p) 78 %t = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %p)`
/external/llvm/test/Transforms/SLPVectorizer/X86/
D	call.ll	15 ; CHECK: call <2 x double> @llvm.sin.v2f64 36 ; CHECK: call <2 x double> @llvm.cos.v2f64 57 ; CHECK: call <2 x double> @llvm.pow.v2f64 79 ; CHECK: call <2 x double> @llvm.exp2.v2f64 101 ; CHECK: call <2 x double> @llvm.sqrt.v2f64 145 ; CHECK: declare <2 x double> @llvm.sin.v2f64(<2 x double>) [[ATTR0:#[0-9]+]] 146 ; CHECK: declare <2 x double> @llvm.cos.v2f64(<2 x double>) [[ATTR0]] 147 ; CHECK: declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>) [[ATTR0]] 148 ; CHECK: declare <2 x double> @llvm.exp2.v2f64(<2 x double>) [[ATTR0]]
/external/llvm/test/Assembler/
D	auto_upgrade_intrinsics.ll	61 declare <2 x double> @llvm.masked.load.v2f64(<2 x double>* %ptrs, i32, <2 x i1> %mask, <2 x double>… 65 ; CHECK: @llvm.masked.load.v2f64.p0v2f64 66 …%res = call <2 x double> @llvm.masked.load.v2f64(<2 x double>* %ptr, i32 1, <2 x i1> %mask, <2 x d… 70 declare void @llvm.masked.store.v2f64(<2 x double> %val, <2 x double>* %ptrs, i32, <2 x i1> %mask) 74 ; CHECK: @llvm.masked.store.v2f64.p0v2f64 75 call void @llvm.masked.store.v2f64(<2 x double> %val, <2 x double>* %ptr, i32 3, <2 x i1> %mask)

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