Searched refs:v32i64 (Results 1 – 9 of 9) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | MachineValueType.h | 100 v32i64 = 50, // 32 x i64 enumerator 280 SimpleTy == MVT::v64i32 || SimpleTy == MVT::v32i64); in is2048BitVector() 354 case v32i64: return i64; in getVectorElementType() 388 case v32i64: return 32; in getVectorNumElements() 511 case v32i64: return 2048; in getSizeInBits() 638 if (NumElements == 32) return MVT::v32i64; in getVectorVT()
|
D | ValueTypes.td | 77 def v32i64 : ValueType<2048,50>; // 32 x i64 vector value
|
/external/llvm/test/CodeGen/X86/ |
D | avx512-bugfix-26264.ll | 42 …%res = call <32 x i64> @llvm.masked.load.v32i64.p0v32i64(<32 x i64>* %ptrs, i32 4, <32 x i1> %mask… 46 declare <32 x i64> @llvm.masked.load.v32i64.p0v32i64(<32 x i64>* %ptrs, i32, <32 x i1> %mask, <32 x…
|
/external/llvm/lib/IR/ |
D | ValueTypes.cpp | 182 case MVT::v32i64: return "v32i64"; in getEVTString() 260 case MVT::v32i64: return VectorType::get(Type::getInt64Ty(Context), 32); in getTypeForEVT()
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 209 if (LocVT == MVT::v32i64 || LocVT == MVT::v64i32 || LocVT == MVT::v128i16 || in CC_Hexagon_VarArg() 360 (LocVT == MVT::v32i64 || LocVT == MVT::v64i32 || LocVT == MVT::v128i16 || in CC_HexagonVector() 425 LocVT == MVT::v64i32 || LocVT == MVT::v32i64) { in RetCC_Hexagon() 547 ty == MVT::v32i64 || ty == MVT::v64i32 || ty == MVT::v128i16 || in IsHvxVectorType() 1140 ((RegVT == MVT::v32i64 || RegVT == MVT::v64i32 || in LowerFormalArguments() 1772 addRegisterClass(MVT::v32i64, &Hexagon::VecDblRegs128BRegClass); in HexagonTargetLowering() 2007 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i64, Custom); in HexagonTargetLowering() 2899 case MVT::v32i64: in getRegForInlineAsmConstraint() 3039 case MVT::v32i64: in allowsMisalignedMemoryAccesses() 3074 case MVT::v32i64: in findRepresentativeClass()
|
D | HexagonRegisterInfo.td | 238 [v256i8,v128i16,v64i32,v32i64], 2048,
|
D | HexagonInstrInfoV60.td | 801 defm : STrivv_pats <v16i64, v32i64>; 876 defm : LDrivv_pats <v16i64, v32i64>;
|
/external/llvm/utils/TableGen/ |
D | CodeGenTarget.cpp | 110 case MVT::v32i64: return "MVT::v32i64"; in getEnumName()
|
/external/llvm/include/llvm/IR/ |
D | Intrinsics.td | 210 def llvm_v32i64_ty : LLVMType<v32i64>; // 32 x i64
|