Home
last modified time | relevance | path

Searched refs:v512i1 (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsV60.td84 def : Pat <(v512i1 (bitconvert (v16i32 VectorRegs:$src1))),
85 (v512i1 (V6_vandvrt(v16i32 VectorRegs:$src1),
89 def : Pat <(v512i1 (bitconvert (v32i16 VectorRegs:$src1))),
90 (v512i1 (V6_vandvrt(v32i16 VectorRegs:$src1),
94 def : Pat <(v512i1 (bitconvert (v64i8 VectorRegs:$src1))),
95 (v512i1 (V6_vandvrt(v64i8 VectorRegs:$src1),
99 def : Pat <(v512i1 (bitconvert (v8i64 VectorRegs:$src1))),
100 (v512i1 (V6_vandvrt(v8i64 VectorRegs:$src1),
104 def : Pat <(v16i32 (bitconvert (v512i1 VecPredRegs:$src1))),
105 (v16i32 (V6_vandqrt(v512i1 VecPredRegs:$src1),
[all …]
DHexagonISelLowering.cpp198 LocVT == MVT::v64i8 || LocVT == MVT::v512i1) { in CC_Hexagon_VarArg()
338 LocVT == MVT::v64i8 || LocVT == MVT::v512i1)) { in CC_HexagonVector()
414 LocVT == MVT::v512i1) { in RetCC_Hexagon()
549 ty == MVT::v512i1 || ty == MVT::v1024i1); in IsHvxVectorType()
1146 } else if (RegVT == MVT::v512i1 || RegVT == MVT::v1024i1) { in LowerFormalArguments()
1763 addRegisterClass(MVT::v512i1, &Hexagon::VecPredRegsRegClass); in HexagonTargetLowering()
2872 case MVT::v512i1: in getRegForInlineAsmConstraint()
DHexagonRegisterInfo.td241 def VecPredRegs : RegisterClass<"Hexagon", [v512i1], 512,
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h65 v512i1 = 19, // 512 x i1 enumerator
265 SimpleTy == MVT::v512i1 || SimpleTy == MVT::v64i8 || in is512BitVector()
323 case v512i1: in getVectorElementType()
376 case v512i1: return 512; in getVectorNumElements()
496 case v512i1: in getSizeInBits()
599 if (NumElements == 512) return MVT::v512i1; in getVectorVT()
DValueTypes.td42 def v512i1 : ValueType<512, 19>; // 512 x i1 vector value
/external/llvm/lib/IR/
DValueTypes.cpp151 case MVT::v512i1: return "v512i1"; in getEVTString()
229 case MVT::v512i1: return VectorType::get(Type::getInt1Ty(Context), 512); in getTypeForEVT()
/external/llvm/utils/TableGen/
DCodeGenTarget.cpp79 case MVT::v512i1: return "MVT::v512i1"; in getEnumName()
/external/llvm/include/llvm/IR/
DIntrinsics.td175 def llvm_v512i1_ty : LLVMType<v512i1>; // 512 x i1