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Searched refs:vcgt (Results 1 – 25 of 46) sorted by relevance

12

/external/capstone/suite/MC/ARM/
Dneon-cmp-encoding.s.cs26 0xa1,0x03,0x40,0xf2 = vcgt.s8 d16, d16, d17
27 0xa1,0x03,0x50,0xf2 = vcgt.s16 d16, d16, d17
28 0xa1,0x03,0x60,0xf2 = vcgt.s32 d16, d16, d17
29 0xa1,0x03,0x40,0xf3 = vcgt.u8 d16, d16, d17
30 0xa1,0x03,0x50,0xf3 = vcgt.u16 d16, d16, d17
31 0xa1,0x03,0x60,0xf3 = vcgt.u32 d16, d16, d17
32 0xa1,0x0e,0x60,0xf3 = vcgt.f32 d16, d16, d17
33 0xe2,0x03,0x40,0xf2 = vcgt.s8 q8, q8, q9
34 0xe2,0x03,0x50,0xf2 = vcgt.s16 q8, q8, q9
35 0xe2,0x03,0x60,0xf2 = vcgt.s32 q8, q8, q9
[all …]
Dneon-bitwise-encoding.s.cs111 0x46,0xa3,0x1a,0xf2 = vcgt.s16 q5, q5, q3
112 0x03,0x53,0x15,0xf2 = vcgt.s16 d5, d5, d3
115 0x4a,0xa0,0xb5,0xf3 = vcgt.s16 q5, q5, #0
116 0x05,0x50,0xb5,0xf3 = vcgt.s16 d5, d5, #0
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-cmp-encoding.s55 vcgt.s8 d16, d16, d17
56 vcgt.s16 d16, d16, d17
57 vcgt.s32 d16, d16, d17
58 vcgt.u8 d16, d16, d17
59 vcgt.u16 d16, d16, d17
60 vcgt.u32 d16, d16, d17
61 vcgt.f32 d16, d16, d17
62 vcgt.s8 q8, q8, q9
63 vcgt.s16 q8, q8, q9
64 vcgt.s32 q8, q8, q9
[all …]
/external/llvm/test/MC/ARM/
Dneon-cmp-encoding.s55 vcgt.s8 d16, d16, d17
56 vcgt.s16 d16, d16, d17
57 vcgt.s32 d16, d16, d17
58 vcgt.u8 d16, d16, d17
59 vcgt.u16 d16, d16, d17
60 vcgt.u32 d16, d16, d17
61 vcgt.f32 d16, d16, d17
62 vcgt.s8 q8, q8, q9
63 vcgt.s16 q8, q8, q9
64 vcgt.s32 q8, q8, q9
[all …]
Dfullfp16-neon.s102 vcgt.f16 d2, d3, d4
103 vcgt.f16 q2, q3, q4
104 @ ARM: vcgt.f16 d2, d3, d4 @ encoding: [0x04,0x2e,0x33,0xf3]
105 @ ARM: vcgt.f16 q2, q3, q4 @ encoding: [0x48,0x4e,0x36,0xf3]
106 @ THUMB: vcgt.f16 d2, d3, d4 @ encoding: [0x33,0xff,0x04,0x2e]
107 @ THUMB: vcgt.f16 q2, q3, q4 @ encoding: [0x36,0xff,0x48,0x4e]
109 vcgt.f16 d2, d3, #0
110 vcgt.f16 q2, q3, #0
111 @ ARM: vcgt.f16 d2, d3, #0 @ encoding: [0x03,0x24,0xb5,0xf3]
112 @ ARM: vcgt.f16 q2, q3, #0 @ encoding: [0x46,0x44,0xb5,0xf3]
[all …]
Dfullfp16-neon-neg.s76 vcgt.f16 d2, d3, d4
77 vcgt.f16 q2, q3, q4
81 vcgt.f16 d2, d3, #0
82 vcgt.f16 q2, q3, #0
Dneon-bitwise-encoding.s310 vcgt.s16 q5, q3
311 vcgt.s16 d5, d3
316 vcgt.s16 q5, #0
317 vcgt.s16 d5, #0
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvcgt.ll6 ;CHECK: vcgt.s8
16 ;CHECK: vcgt.s16
26 ;CHECK: vcgt.s32
36 ;CHECK: vcgt.u8
46 ;CHECK: vcgt.u16
56 ;CHECK: vcgt.u32
66 ;CHECK: vcgt.f32
76 ;CHECK: vcgt.s8
86 ;CHECK: vcgt.s16
96 ;CHECK: vcgt.s32
[all …]
Dvfcmp.ll20 ;CHECK: vcgt.f32
42 ;CHECK: vcgt.f32
54 ;CHECK: vcgt.f32
90 ;CHECK: vcgt.f32
91 ;CHECK-NEXT: vcgt.f32
104 ;CHECK: vcgt.f32
105 ;CHECK-NEXT: vcgt.f32
118 ;CHECK-NEXT: vcgt.f32
132 ;CHECK-NEXT: vcgt.f32
Dvicmp.ll77 ;CHECK: vcgt.s8
97 ;CHECK: vcgt.u16
/external/llvm/test/CodeGen/ARM/
Dvcgt.ll6 ;CHECK: vcgt.s8
16 ;CHECK: vcgt.s16
26 ;CHECK: vcgt.s32
36 ;CHECK: vcgt.u8
46 ;CHECK: vcgt.u16
56 ;CHECK: vcgt.u32
66 ;CHECK: vcgt.f32
76 ;CHECK: vcgt.s8
86 ;CHECK: vcgt.s16
96 ;CHECK: vcgt.s32
[all …]
Dvfcmp.ll20 ;CHECK: vcgt.f32
42 ;CHECK: vcgt.f32
54 ;CHECK: vcgt.f32
90 ;CHECK: vcgt.f32
91 ;CHECK-NEXT: vcgt.f32
104 ;CHECK: vcgt.f32
105 ;CHECK-NEXT: vcgt.f32
118 ;CHECK-NEXT: vcgt.f32
132 ;CHECK-NEXT: vcgt.f32
Dvicmp.ll77 ;CHECK: vcgt.s8
97 ;CHECK: vcgt.u16
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dcmp-vec.ll64 ; ASM: vcgt.u32 q0, q0, q1
66 ; IASM-NOT: vcgt
96 ; ASM: vcgt.u32 q1, q1, q0
98 ; IASM-NOT: vcgt
128 ; ASM: vcgt.s32 q0, q0, q1
130 ; IASM-NOT: vcgt
160 ; ASM: vcgt.s32 q1, q1, q0
162 ; IASM-NOT: vcgt
245 ; ASM-NEXT: vcgt.u32 q0, q0, q1
250 ; IASM-NOT: vcgt
[all …]
/external/clang/test/CodeGen/
D2007-09-05-ConstCtor.c11 const unsigned long vcgt = 1234; in bork() local
12 struct A a = { vcgt }; in bork()
/external/arm-neon-tests/
Dref_vcgt.c26 #define INSN_NAME vcgt
DAndroid.mk26 vcgt vclt vbsl vshl vdup_lane vrshrn_n vqdmull_lane \
DMakefile.gcc47 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \
DMakefile41 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \
/external/llvm/test/MC/Disassembler/ARM/
Dfullfp16-neon-arm.txt74 # CHECK: vcgt.f16 d2, d3, d4
75 # CHECK: vcgt.f16 q2, q3, q4
79 # CHECK: vcgt.f16 d2, d3, #0
80 # CHECK: vcgt.f16 q2, q3, #0
Dfullfp16-neon-thumb.txt74 # CHECK: vcgt.f16 d2, d3, d4
75 # CHECK: vcgt.f16 q2, q3, q4
79 # CHECK: vcgt.f16 d2, d3, #0
80 # CHECK: vcgt.f16 q2, q3, #0
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneon.txt382 # CHECK: vcgt.s8 d16, d16, d17
383 # CHECK: vcgt.s16 d16, d16, d17
384 # CHECK: vcgt.s32 d16, d16, d17
385 # CHECK: vcgt.u8 d16, d16, d17
386 # CHECK: vcgt.u16 d16, d16, d17
387 # CHECK: vcgt.u32 d16, d16, d17
388 # CHECK: vcgt.f32 d16, d16, d17
389 # CHECK: vcgt.s8 q8, q8, q9
390 # CHECK: vcgt.s16 q8, q8, q9
391 # CHECK: vcgt.s32 q8, q8, q9
[all …]
/external/libavc/common/arm/
Dih264_deblk_luma_a9.s120 vcgt.s32 q6, q6, #0 @Q6 = (us_Bs > 0)
125 vcgt.u8 q10, q8, q14 @Q10=(Ap<Beta)
126 vcgt.u8 q11, q8, q15 @Q11=(Aq<Beta)
Dih264_deblk_chroma_a9.s302 vcgt.s16 d12, d12, #0 @Q6 = (us_Bs > 0)
433 vcgt.s16 q9, q7, #0
434 vcgt.s16 q10, q8, #0
633 vcgt.s16 q13, q14, #0
944 vcgt.s16 d12, d12, #0 @Q6 = (us_Bs > 0)
1087 vcgt.s16 q9, q7, #0
1088 vcgt.s16 q10, q8, #0
1312 vcgt.s16 q13, q14, #0
/external/libvpx/libvpx/vpx_dsp/arm/
Dloopfilter_4_neon.asm181 vcgt.u8 d21, d21, d2 ; (abs(p1 - p0) > thresh)*-1
182 vcgt.u8 d22, d22, d2 ; (abs(q1 - q0) > thresh)*-1
476 vcgt.u8 q13, q13, q2 ; (abs(p1 - p0) > thresh)*-1
477 vcgt.u8 q14, q14, q2 ; (abs(q1 - q0) > thresh)*-1

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