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Searched refs:vorr (Results 1 – 25 of 64) sorted by relevance

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/external/llvm/test/MC/ARM/
Dneon-bitwise-encoding.s16 vorr d16, d17, d16
17 vorr q8, q8, q9
19 @ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xf2]
20 @ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xf2]
22 vorr.i32 d16, #0x1000000
23 vorr.i32 q8, #0x1000000
24 vorr.i32 q8, #0x0
26 @ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
27 @ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
28 @ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2]
[all …]
Dvorr-vbic-illegal-cases.s4 vorr.i32 d2, #0xffffffff
5 vorr.i32 q2, #0xffffffff
6 vorr.i32 d2, #0xabababab
7 vorr.i32 q2, #0xabababab
8 vorr.i16 q2, #0xabab
9 vorr.i16 q2, #0xabab
12 @ CHECK: vorr.i32 d2, #0xffffffff
14 @ CHECK: vorr.i32 q2, #0xffffffff
16 @ CHECK: vorr.i32 d2, #0xabababab
18 @ CHECK: vorr.i32 q2, #0xabababab
[all …]
Dneont2-bitwise-encoding.s18 vorr d16, d17, d16
19 vorr q8, q8, q9
20 @ vorr.i32 d16, #0x1000000
21 @ vorr.i32 q8, #0x1000000
22 @ vorr.i32 q8, #0x0
24 @ CHECK: vorr d16, d17, d16 @ encoding: [0x61,0xef,0xb0,0x01]
25 @ CHECK: vorr q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x01]
/external/capstone/suite/MC/ARM/
Dneon-bitwise-encoding.s.cs6 0xb0,0x01,0x61,0xf2 = vorr d16, d17, d16
7 0xf2,0x01,0x60,0xf2 = vorr q8, q8, q9
8 0x11,0x07,0xc0,0xf2 = vorr.i32 d16, #0x1000000
9 0x51,0x07,0xc0,0xf2 = vorr.i32 q8, #0x1000000
10 0x50,0x01,0xc0,0xf2 = vorr.i32 q8, #0
69 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3
70 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3
71 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3
72 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3
73 0x13,0x41,0x27,0xf2 = vorr d4, d7, d3
[all …]
Dneont2-bitwise-encoding.s.cs6 0x61,0xef,0xb0,0x01 = vorr d16, d17, d16
7 0x60,0xef,0xf2,0x01 = vorr q8, q8, q9
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-bitwise-encoding.s15 vorr d16, d17, d16
16 vorr q8, q8, q9
18 @ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xf2]
19 @ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xf2]
21 vorr.i32 d16, #0x1000000
22 vorr.i32 q8, #0x1000000
23 vorr.i32 q8, #0x0
25 @ FIXME: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
26 @ FIXME: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
27 @ FIXME: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2]
Dneont2-bitwise-encoding.s18 vorr d16, d17, d16
19 vorr q8, q8, q9
20 @ vorr.i32 d16, #0x1000000
21 @ vorr.i32 q8, #0x1000000
22 @ vorr.i32 q8, #0x0
24 @ CHECK: vorr d16, d17, d16 @ encoding: [0x61,0xef,0xb0,0x01]
25 @ CHECK: vorr q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x01]
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Dor-vec.ll1 ; Show that we know how to translate vorr vector instructions.
31 ; ASM: vorr.i32 q0, q0, q1
33 ; IASM-NOT: vorr.i32
46 ; ASM: vorr.i16 q0, q0, q1
48 ; IASM-NOT: vorr.i16
61 ; ASM: vorr.i8 q0, q0, q1
63 ; IASM-NOT: vorr.i8
80 ; ASM: vorr.i32 q0, q0, q1
82 ; IASM-NOT: vorr.i32
95 ; ASM: vorr.i16 q0, q0, q1
[all …]
Dvec-move.ll36 ; The integrated assembler emits a vorr instead of a vmov.
39 ; IASM-NOT: vorr q0, q1, q1
/external/llvm/test/CodeGen/ARM/
Dinteger_insertelement.ll4 ; the vector is not spuriously copied. "vorr dX, dY, dY" is the way of moving
8 ; CHECK-NOT: vorr d
10 ; CHECK-NOT: vorr d
18 ; CHECK-NOT: vorr d
20 ; CHECK-NOT: vorr d
28 ; CHECK-NOT: vorr d
30 ; CHECK-NOT: vorr d
Dwiden-vmovs.ll8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
9 ; CHECK: vorr [[DL:d[0-9]+]], [[DN:d[0-9]+]]
18 ; - The execution domain switch to vorr works across basic blocks.
Dvfcmp.ll92 ;CHECK-NEXT: vorr
106 ;CHECK-NEXT: vorr
119 ;CHECK-NEXT: vorr
133 ;CHECK-NEXT: vorr
Dvbits.ll293 ;CHECK: vorr
302 ;CHECK: vorr
311 ;CHECK: vorr
320 ;CHECK: vorr
329 ;CHECK: vorr
338 ;CHECK: vorr
347 ;CHECK: vorr
356 ;CHECK: vorr
513 ; CHECK: vorr
523 ; CHECK: vorr
D2013-07-29-vector-or-combine.ll17 ; CHECK: vorr q9, q9, q10
/external/boringssl/ios-arm/crypto/fipsmodule/
Daesv8-armx32.S436 vorr q3,q0,q0
437 vorr q1,q0,q0
438 vorr q11,q10,q10
441 vorr q1,q10,q10
443 vorr q2,q0,q0
444 vorr q3,q1,q1
445 vorr q11,q10,q10
485 vorr q6,q11,q11
518 vorr q0,q2,q2
520 vorr q1,q3,q3
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dwiden-vmovs.ll8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
9 ; CHECK: vorr [[DL:d[0-9]+]], [[DN:d[0-9]+]]
17 ; - The execution domain switch to vorr works across basic blocks.
Dvfcmp.ll92 ;CHECK-NEXT: vorr
106 ;CHECK-NEXT: vorr
119 ;CHECK-NEXT: vorr
133 ;CHECK-NEXT: vorr
Dvbits.ll293 ;CHECK: vorr
302 ;CHECK: vorr
311 ;CHECK: vorr
320 ;CHECK: vorr
329 ;CHECK: vorr
338 ;CHECK: vorr
347 ;CHECK: vorr
356 ;CHECK: vorr
513 ; CHECK: vorr
523 ; CHECK: vorr
/external/llvm/test/CodeGen/Thumb2/
Dinflate-regs.ll13 ; CHECK: vorr
32 ; CHECK: vorr
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneon-tests.txt30 # CHECK: vorr d0, d15, d15
72 # CHECK: vorr.i32 q15, #0x4F0000
/external/llvm/test/MC/Disassembler/ARM/
Dneon-tests.txt30 # CHECK: vorr d0, d15, d15
72 # CHECK: vorr.i32 q15, #0x4f0000
/external/arm-neon-tests/
Dref_vorr.c26 #define INSN_NAME vorr
DAndroid.mk31 vqrdmulh_lane vqrshl vaba vabal vabd vabdl vand vorr vorn \
/external/libmpeg2/common/arm/
Dideint_cac_a9.s98 vorr.u32 q8, q0, q8
125 vorr.u32 q9, q2, q9
/external/libavc/common/arm/
Dih264_deblk_luma_a9.s128 vorr q9, q9, q12 @Q9 = ( ABS(p0 - q0) >= Alpha ) | ( ABS(q1 - q0) >= Beta )
131vorr q9, q9, q13 @Q9 = ( ABS(p0 - q0) >= Alpha ) | ( ABS(q1 - q0) >= Beta ) | (…
251 vorr q9, q9, q7 @ABS(p0 - q0) >= Alpha || ABS(q1 - q0) >= Beta
253vorr q9, q9, q8 @ABS(p0 - q0) >= Alpha || ABS(q1 - q0) >= Beta || ABS(p1 - p0)…

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