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Searched refs:vrev32 (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/test/MC/ARM/
Dneon-reverse-encoding.s15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3]
16 vrev32.8 d16, d16
17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3]
18 vrev32.16 d16, d16
19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3]
20 vrev32.8 q8, q8
21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3]
22 vrev32.16 q8, q8
Dneont2-reverse-encoding.s15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00]
16 vrev32.8 d16, d16
17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00]
18 vrev32.16 d16, d16
19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00]
20 vrev32.8 q8, q8
21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00]
22 vrev32.16 q8, q8
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-reverse-encoding.s15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xa0,0x00,0xf0,0xf3]
16 vrev32.8 d16, d16
17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xa0,0x00,0xf4,0xf3]
18 vrev32.16 d16, d16
19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xe0,0x00,0xf0,0xf3]
20 vrev32.8 q8, q8
21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xe0,0x00,0xf4,0xf3]
22 vrev32.16 q8, q8
Dneont2-reverse-encoding.s15 @ CHECK: vrev32.8 d16, d16 @ encoding: [0xf0,0xff,0xa0,0x00]
16 vrev32.8 d16, d16
17 @ CHECK: vrev32.16 d16, d16 @ encoding: [0xf4,0xff,0xa0,0x00]
18 vrev32.16 d16, d16
19 @ CHECK: vrev32.8 q8, q8 @ encoding: [0xf0,0xff,0xe0,0x00]
20 vrev32.8 q8, q8
21 @ CHECK: vrev32.16 q8, q8 @ encoding: [0xf4,0xff,0xe0,0x00]
22 vrev32.16 q8, q8
/external/capstone/suite/MC/ARM/
Dneont2-reverse-encoding.s.cs8 0xf0,0xff,0xa0,0x00 = vrev32.8 d16, d16
9 0xf4,0xff,0xa0,0x00 = vrev32.16 d16, d16
10 0xf0,0xff,0xe0,0x00 = vrev32.8 q8, q8
11 0xf4,0xff,0xe0,0x00 = vrev32.16 q8, q8
Dneon-reverse-encoding.s.cs8 0xa0,0x00,0xf0,0xf3 = vrev32.8 d16, d16
9 0xa0,0x00,0xf4,0xf3 = vrev32.16 d16, d16
10 0xe0,0x00,0xf0,0xf3 = vrev32.8 q8, q8
11 0xe0,0x00,0xf4,0xf3 = vrev32.16 q8, q8
/external/llvm/test/CodeGen/ARM/
Dbig-endian-neon-extend.ll21 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]]
51 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]]
68 ; CHECK-NEXT: vrev32.16 [[REG]], [[REG]]
70 ; CHECK-NEXT: vrev32.16 [[REG]], {{d[0-9]+}}
82 ; CHECK-NEXT: vrev32.8 [[REG]], [[REG]]
97 ; CHECK-NEXT: vrev32.8 [[REG]], [[REG]]
Dbig-endian-neon-trunc-store.ll6 ; CHECK: vrev32.16 [[REG]], [[REG]]
8 ; CHECK: vrev32.16 [[REG]], [[REG2]]
20 ; CHECK: vrev32.8 [[REG]], [[REG2]]
Dvrev.ll69 ;CHECK: vrev32.8
77 ;CHECK: vrev32.16
85 ;CHECK: vrev32.8
93 ;CHECK: vrev32.16
127 ;CHECK: vrev32.16
183 ; CHECK: vrev32.8
Dbig-endian-neon-bitconv.ll191 ; CHECK: vrev32.8
201 ; CHECK: vrev32.8
212 ; CHECK: vrev32.16
222 ; CHECK: vrev32.16
296 ; CHECK: vrev32.8
306 ; CHECK: vrev32.8
317 ; CHECK: vrev32.16
327 ; CHECK: vrev32.16
Dpopcnt.ll51 ; CHECK: vrev32.16 {{d[0-9]+}}, {{d[0-9]+}}
66 ; CHECK: vrev32.16 {{q[0-9]+}}, {{q[0-9]+}}
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvrev.ll69 ;CHECK: vrev32.8
77 ;CHECK: vrev32.16
85 ;CHECK: vrev32.8
93 ;CHECK: vrev32.16
127 ;CHECK: vrev32.16
155 ; CHECK: vrev32.16
/external/boringssl/linux-arm/crypto/fipsmodule/
Dsha1-armv4-large.S519 vrev32.8 q0,q0 @ yes, even on
520 vrev32.8 q1,q1 @ big-endian...
521 vrev32.8 q2,q2
523 vrev32.8 q3,q3
1217 vrev32.8 q0,q0
1238 vrev32.8 q1,q1
1269 vrev32.8 q2,q2
1300 vrev32.8 q3,q3
1377 vrev32.8 q4,q4
1378 vrev32.8 q5,q5
[all …]
Dbsaes-armv7.S1407 vrev32.8 q0,q0
1409 vrev32.8 q4,q4
/external/boringssl/ios-arm/crypto/fipsmodule/
Dsha1-armv4-large.S522 vrev32.8 q0,q0 @ yes, even on
523 vrev32.8 q1,q1 @ big-endian...
524 vrev32.8 q2,q2
526 vrev32.8 q3,q3
1220 vrev32.8 q0,q0
1241 vrev32.8 q1,q1
1272 vrev32.8 q2,q2
1303 vrev32.8 q3,q3
1382 vrev32.8 q4,q4
1383 vrev32.8 q5,q5
[all …]
Dbsaes-armv7.S1416 vrev32.8 q0,q0
1418 vrev32.8 q4,q4
/external/boringssl/ios-arm/crypto/chacha/
Dchacha-armv4.S880 vrev32.16 q3,q3
882 vrev32.16 q7,q7
884 vrev32.16 q11,q11
988 vrev32.16 q3,q3
990 vrev32.16 q7,q7
992 vrev32.16 q11,q11
/external/boringssl/linux-arm/crypto/chacha/
Dchacha-armv4.S877 vrev32.16 q3,q3
879 vrev32.16 q7,q7
881 vrev32.16 q11,q11
985 vrev32.16 q3,q3
987 vrev32.16 q7,q7
989 vrev32.16 q11,q11
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt860 # CHECK: vrev32.8 d16, d16
862 # CHECK: vrev32.16 d16, d16
864 # CHECK: vrev32.8 q8, q8
866 # CHECK: vrev32.16 q8, q8
Dneon.txt969 # CHECK: vrev32.8 d16, d16
971 # CHECK: vrev32.16 d16, d16
973 # CHECK: vrev32.8 q8, q8
975 # CHECK: vrev32.16 q8, q8
/external/libavc/encoder/arm/
Dime_distortion_metrics_a9q.s1064 vrev32.16 d0, d16 @I
1071 vrev32.16 q9, q7 @I Rearrange si's
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt860 # CHECK: vrev32.8 d16, d16
862 # CHECK: vrev32.16 d16, d16
864 # CHECK: vrev32.8 q8, q8
866 # CHECK: vrev32.16 q8, q8
Dneon.txt969 # CHECK: vrev32.8 d16, d16
971 # CHECK: vrev32.16 d16, d16
973 # CHECK: vrev32.8 q8, q8
975 # CHECK: vrev32.16 q8, q8
/external/vixl/src/aarch32/
Dassembler-aarch32.h5484 void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
5485 void vrev32(DataType dt, DRegister rd, DRegister rm) { in vrev32() function
5486 vrev32(al, dt, rd, rm); in vrev32()
5489 void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);
5490 void vrev32(DataType dt, QRegister rd, QRegister rm) { in vrev32() function
5491 vrev32(al, dt, rd, rm); in vrev32()
Ddisasm-aarch32.h2306 void vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm);
2308 void vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm);

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