| /external/mesa3d/src/gallium/auxiliary/draw/ |
| D | draw_vs.c | 56 struct draw_vertex_shader *vs = NULL; in draw_create_vertex_shader() local
64 vs = draw_create_vs_llvm(draw, shader); in draw_create_vertex_shader()
68 if (!vs) { in draw_create_vertex_shader()
69 vs = draw_create_vs_exec( draw, shader ); in draw_create_vertex_shader()
72 if (vs) in draw_create_vertex_shader()
76 vs->position_output = -1; in draw_create_vertex_shader()
77 for (i = 0; i < vs->info.num_outputs; i++) { in draw_create_vertex_shader()
78 if (vs->info.output_semantic_name[i] == TGSI_SEMANTIC_POSITION && in draw_create_vertex_shader()
79 vs->info.output_semantic_index[i] == 0) in draw_create_vertex_shader()
80 vs->position_output = i; in draw_create_vertex_shader()
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| D | draw_vs_llvm.c | 87 struct llvm_vertex_shader *vs = CALLOC_STRUCT( llvm_vertex_shader ); in draw_create_vs_llvm() local
89 if (!vs) in draw_create_vs_llvm()
93 vs->base.state.tokens = tgsi_dup_tokens(state->tokens); in draw_create_vs_llvm()
94 if (!vs->base.state.tokens) { in draw_create_vs_llvm()
95 FREE(vs); in draw_create_vs_llvm()
99 tgsi_scan_shader(state->tokens, &vs->base.info); in draw_create_vs_llvm()
101 vs->variant_key_size = in draw_create_vs_llvm()
103 vs->base.info.file_max[TGSI_FILE_INPUT]+1, in draw_create_vs_llvm()
104 MAX2(vs->base.info.file_max[TGSI_FILE_SAMPLER]+1, in draw_create_vs_llvm()
105 vs->base.info.file_max[TGSI_FILE_SAMPLER_VIEW]+1)); in draw_create_vs_llvm()
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| D | draw_vs_exec.c | 52 static struct exec_vertex_shader *exec_vertex_shader( struct draw_vertex_shader *vs ) in exec_vertex_shader() argument
54 return (struct exec_vertex_shader *)vs; in exec_vertex_shader()
73 draw->vs.tgsi.sampler, in vs_exec_prepare()
74 draw->vs.tgsi.image, in vs_exec_prepare()
75 draw->vs.tgsi.buffer); in vs_exec_prepare()
223 struct exec_vertex_shader *vs = CALLOC_STRUCT( exec_vertex_shader ); in draw_create_vs_exec() local
225 if (!vs) in draw_create_vs_exec()
229 vs->base.state.tokens = tgsi_dup_tokens(state->tokens); in draw_create_vs_exec()
230 if (!vs->base.state.tokens) { in draw_create_vs_exec()
231 FREE(vs); in draw_create_vs_exec()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_vs_state.c | 43 struct brw_stage_state *stage_state = &brw->vs.base; in brw_upload_vs_unit()
48 struct brw_vs_unit_state *vs; in brw_upload_vs_unit() local
50 vs = brw_state_batch(brw, AUB_TRACE_VS_STATE, in brw_upload_vs_unit()
51 sizeof(*vs), 32, &stage_state->state_offset); in brw_upload_vs_unit()
52 memset(vs, 0, sizeof(*vs)); in brw_upload_vs_unit()
55 vs->thread0.grf_reg_count = ALIGN(vue_prog_data->total_grf, 16) / 16 - 1; in brw_upload_vs_unit()
56 vs->thread0.kernel_start_pointer = in brw_upload_vs_unit()
61 (vs->thread0.grf_reg_count << 1)) >> 6; in brw_upload_vs_unit()
64 vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; in brw_upload_vs_unit()
66 vs->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754; in brw_upload_vs_unit()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_pipe_vs.c | 102 struct svga_vertex_shader *vs = CALLOC_STRUCT(svga_vertex_shader); in svga_create_vs_state() local
104 if (!vs) in svga_create_vs_state()
111 vs->base.tokens = tgsi_dup_tokens(substitute_vs(svga->debug.shader_id, in svga_create_vs_state()
116 tgsi_scan_shader(vs->base.tokens, &vs->base.info); in svga_create_vs_state()
123 tmp2.tokens = vs->base.tokens; in svga_create_vs_state()
124 vs->draw_shader = draw_create_vertex_shader(svga->swtnl.draw, &tmp2); in svga_create_vs_state()
127 vs->base.id = svga->debug.shader_id++; in svga_create_vs_state()
129 vs->generic_outputs = svga_get_generic_outputs_mask(&vs->base.info); in svga_create_vs_state()
133 vs->base.stream_output = svga_create_stream_output(svga, &vs->base, in svga_create_vs_state()
138 return vs; in svga_create_vs_state()
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| D | svga_state_vs.c | 76 const struct svga_vertex_shader *vs, in translate_vertex_program() argument
80 return svga_tgsi_vgpu10_translate(svga, &vs->base, key, in translate_vertex_program()
84 return svga_tgsi_vgpu9_translate(svga, &vs->base, key, in translate_vertex_program()
96 struct svga_vertex_shader *vs, in get_compiled_dummy_vertex_shader() argument
106 FREE((void *) vs->base.tokens); in get_compiled_dummy_vertex_shader()
107 vs->base.tokens = dummy; in get_compiled_dummy_vertex_shader()
109 variant = translate_vertex_program(svga, vs, key); in get_compiled_dummy_vertex_shader()
119 struct svga_vertex_shader *vs, in compile_vs() argument
126 variant = translate_vertex_program(svga, vs, key); in compile_vs()
130 variant = get_compiled_dummy_vertex_shader(svga, vs, key); in compile_vs()
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| /external/valgrind/memcheck/tests/ |
| D | unit_oset.c | 90 UWord* vs[NN]; in example1singleset() local
104 vs[i] = VG_(OSetGen_AllocNode)(oset, sizeof(Word)); in example1singleset()
105 *(vs[i]) = 2*(i+1); in example1singleset()
106 sorted_elts[i] = *(vs[i]); in example1singleset()
112 UWord* tmp= vs[r1]; in example1singleset()
113 vs[r1] = vs[r2]; in example1singleset()
114 vs[r2] = tmp; in example1singleset()
119 VG_(OSetGen_Insert)(oset, vs[i]); in example1singleset()
127 assert( VG_(OSetGen_Contains)(oset, vs[i]) ); in example1singleset()
180 v = *(vs[i]) + 1; in example1singleset()
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| /external/mksh/src/ |
| D | edit.c | 3500 static struct edstate *vs; /* current Vi editing mode state */ variable
3564 vs = &ebuf; in x_vi()
3616 if (vs->linelen == 0) { in x_vi()
3633 if (c == -1 || (ssize_t)LINE <= vs->linelen) in x_vi()
3636 if (vs->cbuf != buf) in x_vi()
3637 memcpy(buf, vs->cbuf, vs->linelen); in x_vi()
3639 buf[vs->linelen++] = '\n'; in x_vi()
3641 return (vs->linelen); in x_vi()
3678 vs->cursor--; in vi_hook()
3700 vs->cursor = 0; in vi_hook()
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| /external/clang/test/CodeGen/ |
| D | builtins-ppc-altivec.c | 19 vector short vs = { -1, 2, -3, 4, -5, 6, -7, 8 }; variable
67 vs = vec_abs(vs); in test1()
98 vs = vec_abss(vs); in test1()
135 res_vs = vec_add(vs, vs); in test1()
139 res_vs = vec_add(vbs, vs); in test1()
143 res_vs = vec_add(vs, vbs); in test1()
211 res_vs = vec_vadduhm(vs, vs); in test1()
215 res_vs = vec_vadduhm(vbs, vs); in test1()
219 res_vs = vec_vadduhm(vs, vbs); in test1()
297 res_vs = vec_adds(vs, vs); in test1()
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rdlow-operand-imm8-in-it-block-t32.cc | 110 {{vs, r3, 135}, true, vs, "vs r3 135", "vs_r3_135"},
123 {{vs, r2, 252}, true, vs, "vs r2 252", "vs_r2_252"},
186 {{vs, r4, 250}, true, vs, "vs r4 250", "vs_r4_250"},
190 {{vs, r5, 70}, true, vs, "vs r5 70", "vs_r5_70"},
191 {{vs, r4, 51}, true, vs, "vs r4 51", "vs_r4_51"},
192 {{vs, r3, 176}, true, vs, "vs r3 176", "vs_r3_176"},
219 {{vs, r3, 113}, true, vs, "vs r3 113", "vs_r3_113"},
235 {{vs, r1, 14}, true, vs, "vs r1 14", "vs_r1_14"},
247 {{vs, r7, 252}, true, vs, "vs r7 252", "vs_r7_252"},
254 {{vs, r1, 138}, true, vs, "vs r1 138", "vs_r1_138"},
[all …]
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| D | test-assembler-cond-rdlow-rnlow-operand-immediate-imm8-in-it-block-t32.cc | 107 {{vs, r5, r5, 195}, true, vs, "vs r5 r5 195", "vs_r5_r5_195"},
114 {{vs, r3, r3, 101}, true, vs, "vs r3 r3 101", "vs_r3_r3_101"},
116 {{vs, r0, r0, 53}, true, vs, "vs r0 r0 53", "vs_r0_r0_53"},
129 {{vs, r1, r1, 98}, true, vs, "vs r1 r1 98", "vs_r1_r1_98"},
136 {{vs, r7, r7, 220}, true, vs, "vs r7 r7 220", "vs_r7_r7_220"},
150 {{vs, r7, r7, 194}, true, vs, "vs r7 r7 194", "vs_r7_r7_194"},
160 {{vs, r4, r4, 142}, true, vs, "vs r4 r4 142", "vs_r4_r4_142"},
170 {{vs, r1, r1, 192}, true, vs, "vs r1 r1 192", "vs_r1_r1_192"},
192 {{vs, r6, r6, 79}, true, vs, "vs r6 r6 79", "vs_r6_r6_79"},
194 {{vs, r0, r0, 157}, true, vs, "vs r0 r0 157", "vs_r0_r0_157"},
[all …]
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| D | test-assembler-cond-rd-operand-rn-in-it-block-t32.cc | 1446 {{vs, r0, r0}, true, vs, "vs r0 r0", "vs_r0_r0"},
1447 {{vs, r0, r1}, true, vs, "vs r0 r1", "vs_r0_r1"},
1448 {{vs, r0, r2}, true, vs, "vs r0 r2", "vs_r0_r2"},
1449 {{vs, r0, r3}, true, vs, "vs r0 r3", "vs_r0_r3"},
1450 {{vs, r0, r4}, true, vs, "vs r0 r4", "vs_r0_r4"},
1451 {{vs, r0, r5}, true, vs, "vs r0 r5", "vs_r0_r5"},
1452 {{vs, r0, r6}, true, vs, "vs r0 r6", "vs_r0_r6"},
1453 {{vs, r0, r7}, true, vs, "vs r0 r7", "vs_r0_r7"},
1454 {{vs, r0, r8}, true, vs, "vs r0 r8", "vs_r0_r8"},
1455 {{vs, r0, r9}, true, vs, "vs r0 r9", "vs_r0_r9"},
[all …]
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| D | test-assembler-cond-rdlow-rnlow-operand-immediate-zero-in-it-block-t32.cc | 479 {{vs, r0, r0, 0}, true, vs, "vs r0 r0 0", "vs_r0_r0_0"},
480 {{vs, r0, r1, 0}, true, vs, "vs r0 r1 0", "vs_r0_r1_0"},
481 {{vs, r0, r2, 0}, true, vs, "vs r0 r2 0", "vs_r0_r2_0"},
482 {{vs, r0, r3, 0}, true, vs, "vs r0 r3 0", "vs_r0_r3_0"},
483 {{vs, r0, r4, 0}, true, vs, "vs r0 r4 0", "vs_r0_r4_0"},
484 {{vs, r0, r5, 0}, true, vs, "vs r0 r5 0", "vs_r0_r5_0"},
485 {{vs, r0, r6, 0}, true, vs, "vs r0 r6 0", "vs_r0_r6_0"},
486 {{vs, r0, r7, 0}, true, vs, "vs r0 r7 0", "vs_r0_r7_0"},
487 {{vs, r1, r0, 0}, true, vs, "vs r1 r0 0", "vs_r1_r0_0"},
488 {{vs, r1, r1, 0}, true, vs, "vs r1 r1 0", "vs_r1_r1_0"},
[all …]
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| D | test-assembler-cond-rd-operand-rn-low-registers-in-it-block-t32.cc | 479 {{vs, r0, r0}, true, vs, "vs r0 r0", "vs_r0_r0"},
480 {{vs, r0, r1}, true, vs, "vs r0 r1", "vs_r0_r1"},
481 {{vs, r0, r2}, true, vs, "vs r0 r2", "vs_r0_r2"},
482 {{vs, r0, r3}, true, vs, "vs r0 r3", "vs_r0_r3"},
483 {{vs, r0, r4}, true, vs, "vs r0 r4", "vs_r0_r4"},
484 {{vs, r0, r5}, true, vs, "vs r0 r5", "vs_r0_r5"},
485 {{vs, r0, r6}, true, vs, "vs r0 r6", "vs_r0_r6"},
486 {{vs, r0, r7}, true, vs, "vs r0 r7", "vs_r0_r7"},
487 {{vs, r1, r0}, true, vs, "vs r1 r0", "vs_r1_r0"},
488 {{vs, r1, r1}, true, vs, "vs r1 r1", "vs_r1_r1"},
[all …]
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| D | test-assembler-cond-rdlow-rnlow-operand-immediate-imm3-in-it-block-t32.cc | 102 {{vs, r5, r6, 7}, true, vs, "vs r5 r6 7", "vs_r5_r6_7"},
167 {{vs, r7, r4, 2}, true, vs, "vs r7 r4 2", "vs_r7_r4_2"},
178 {{vs, r4, r6, 7}, true, vs, "vs r4 r6 7", "vs_r4_r6_7"},
187 {{vs, r2, r6, 0}, true, vs, "vs r2 r6 0", "vs_r2_r6_0"},
202 {{vs, r0, r5, 7}, true, vs, "vs r0 r5 7", "vs_r0_r5_7"},
205 {{vs, r0, r6, 1}, true, vs, "vs r0 r6 1", "vs_r0_r6_1"},
209 {{vs, r1, r2, 4}, true, vs, "vs r1 r2 4", "vs_r1_r2_4"},
213 {{vs, r6, r2, 6}, true, vs, "vs r6 r2 6", "vs_r6_r2_6"},
225 {{vs, r7, r3, 2}, true, vs, "vs r7 r3 2", "vs_r7_r3_2"},
237 {{vs, r4, r4, 4}, true, vs, "vs r4 r4 4", "vs_r4_r4_4"},
[all …]
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| D | test-assembler-cond-rd-operand-rn-shift-amount-1to32-in-it-block-t32.cc | 123 {{vs, r5, r7, LSR, 5}, true, vs, "vs r5 r7 LSR 5", "vs_r5_r7_LSR_5"},
159 {{vs, r4, r7, LSR, 8}, true, vs, "vs r4 r7 LSR 8", "vs_r4_r7_LSR_8"},
164 {{vs, r6, r3, LSR, 16}, true, vs, "vs r6 r3 LSR 16", "vs_r6_r3_LSR_16"},
173 {{vs, r7, r4, ASR, 16}, true, vs, "vs r7 r4 ASR 16", "vs_r7_r4_ASR_16"},
186 {{vs, r6, r5, LSR, 14}, true, vs, "vs r6 r5 LSR 14", "vs_r6_r5_LSR_14"},
204 {{vs, r6, r0, ASR, 8}, true, vs, "vs r6 r0 ASR 8", "vs_r6_r0_ASR_8"},
205 {{vs, r3, r4, LSR, 8}, true, vs, "vs r3 r4 LSR 8", "vs_r3_r4_LSR_8"},
226 {{vs, r2, r3, LSR, 28}, true, vs, "vs r2 r3 LSR 28", "vs_r2_r3_LSR_28"},
229 {{vs, r6, r0, LSR, 5}, true, vs, "vs r6 r0 LSR 5", "vs_r6_r0_LSR_5"},
234 {{vs, r1, r4, LSR, 27}, true, vs, "vs r1 r4 LSR 27", "vs_r1_r4_LSR_27"},
[all …]
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| D | test-assembler-cond-rd-rn-operand-rm-all-low-rd-is-rn-in-it-block-t32.cc | 124 {{vs, r7, r7, r5}, true, vs, "vs r7 r7 r5", "vs_r7_r7_r5"},
127 {{vs, r1, r1, r5}, true, vs, "vs r1 r1 r5", "vs_r1_r1_r5"},
128 {{vs, r7, r7, r3}, true, vs, "vs r7 r7 r3", "vs_r7_r7_r3"},
154 {{vs, r6, r6, r3}, true, vs, "vs r6 r6 r3", "vs_r6_r6_r3"},
164 {{vs, r3, r3, r1}, true, vs, "vs r3 r3 r1", "vs_r3_r3_r1"},
178 {{vs, r0, r0, r7}, true, vs, "vs r0 r0 r7", "vs_r0_r0_r7"},
180 {{vs, r0, r0, r5}, true, vs, "vs r0 r0 r5", "vs_r0_r0_r5"},
194 {{vs, r5, r5, r6}, true, vs, "vs r5 r5 r6", "vs_r5_r5_r6"},
204 {{vs, r3, r3, r2}, true, vs, "vs r3 r3 r2", "vs_r3_r3_r2"},
207 {{vs, r6, r6, r1}, true, vs, "vs r6 r6 r1", "vs_r6_r6_r1"},
[all …]
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| D | test-assembler-cond-rd-operand-rn-shift-amount-1to31-in-it-block-t32.cc | 106 {{vs, r6, r0, LSL, 26}, true, vs, "vs r6 r0 LSL 26", "vs_r6_r0_LSL_26"},
107 {{vs, r3, r1, LSL, 26}, true, vs, "vs r3 r1 LSL 26", "vs_r3_r1_LSL_26"},
155 {{vs, r1, r1, LSL, 28}, true, vs, "vs r1 r1 LSL 28", "vs_r1_r1_LSL_28"},
162 {{vs, r6, r2, LSL, 4}, true, vs, "vs r6 r2 LSL 4", "vs_r6_r2_LSL_4"},
171 {{vs, r0, r6, LSL, 24}, true, vs, "vs r0 r6 LSL 24", "vs_r0_r6_LSL_24"},
204 {{vs, r7, r5, LSL, 1}, true, vs, "vs r7 r5 LSL 1", "vs_r7_r5_LSL_1"},
208 {{vs, r7, r1, LSL, 9}, true, vs, "vs r7 r1 LSL 9", "vs_r7_r1_LSL_9"},
218 {{vs, r7, r4, LSL, 19}, true, vs, "vs r7 r4 LSL 19", "vs_r7_r4_LSL_19"},
222 {{vs, r5, r3, LSL, 11}, true, vs, "vs r5 r3 LSL 11", "vs_r5_r3_LSL_11"},
224 {{vs, r7, r0, LSL, 27}, true, vs, "vs r7 r0 LSL 27", "vs_r7_r0_LSL_27"},
[all …]
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| /external/mesa3d/src/gallium/drivers/r300/ |
| D | r300_vs.c | 108 struct r300_vertex_shader * vs = c->UserData; in set_vertex_inputs_outputs() local
109 struct r300_shader_semantics* outputs = &vs->outputs; in set_vertex_inputs_outputs()
110 struct tgsi_shader_info* info = &vs->info; in set_vertex_inputs_outputs()
174 struct r300_vertex_shader *vs) in r300_init_vs_outputs() argument
176 tgsi_scan_shader(vs->state.tokens, &vs->info); in r300_init_vs_outputs()
177 r300_shader_read_vs_outputs(r300, &vs->info, &vs->outputs); in r300_init_vs_outputs()
206 struct r300_vertex_shader *vs) in r300_translate_vertex_shader() argument
218 compiler.code = &vs->code; in r300_translate_vertex_shader()
219 compiler.UserData = vs; in r300_translate_vertex_shader()
231 tgsi_dump(vs->state.tokens, 0); in r300_translate_vertex_shader()
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| /external/libexif/libexif/canon/ |
| D | mnote-canon-entry.c | 443 unsigned int t, ExifShort vs, char *val, unsigned int maxlen) in canon_search_table_value() argument
449 ((table[j].subtag == t) && table[j].value <= vs)); j++) { in canon_search_table_value()
450 if ((table[j].subtag == t) && (table[j].value == vs)) { in canon_search_table_value()
454 if ((table[j].subtag == t) && (table[j].value == vs) && table[j].name) { in canon_search_table_value()
459 snprintf (val, maxlen, "0x%04x", vs); in canon_search_table_value()
465 unsigned int t, ExifShort vs, char *val, unsigned int maxlen) in canon_search_table_bitfield() argument
484 if ((vs >> bit) & 1) { in canon_search_table_bitfield()
491 if ((vs >> bit) & 1) { in canon_search_table_bitfield()
499 snprintf (val, maxlen, "0x%04x", vs); in canon_search_table_bitfield()
555 ExifShort vs, n; in mnote_canon_entry_get_value() local
[all …]
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_state_vs.c | 46 struct draw_vertex_shader *vs; in llvmpipe_create_vs_state() local
48 vs = draw_create_vertex_shader(llvmpipe->draw, templ); in llvmpipe_create_vs_state()
49 if (!vs) { in llvmpipe_create_vs_state()
54 debug_printf("llvmpipe: Create vertex shader %p:\n", (void *) vs); in llvmpipe_create_vs_state()
58 return vs; in llvmpipe_create_vs_state()
66 struct draw_vertex_shader *vs = (struct draw_vertex_shader *)_vs; in llvmpipe_bind_vs_state() local
68 if (llvmpipe->vs == vs) in llvmpipe_bind_vs_state()
71 draw_bind_vertex_shader(llvmpipe->draw, vs); in llvmpipe_bind_vs_state()
73 llvmpipe->vs = vs; in llvmpipe_bind_vs_state()
83 struct draw_vertex_shader *vs = (struct draw_vertex_shader *)_vs; in llvmpipe_delete_vs_state() local
[all …]
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | r3xx_vertprog_dump.c | 172 struct r300_vertex_program_code * vs = c->code; in r300_vertex_program_dump() local
173 unsigned instrcount = vs->length / 4; in r300_vertex_program_dump()
182 fprintf(stderr, "%d: op: 0x%08x", i, vs->body.d[offset]); in r300_vertex_program_dump()
183 r300_vs_op_dump(vs->body.d[offset]); in r300_vertex_program_dump()
186 fprintf(stderr, " src%i: 0x%08x", src, vs->body.d[offset+1+src]); in r300_vertex_program_dump()
187 r300_vs_src_dump(vs->body.d[offset+1+src]); in r300_vertex_program_dump()
191 fprintf(stderr, "Flow Control Ops: 0x%08x\n",vs->fc_ops); in r300_vertex_program_dump()
192 for(i = 0; i < vs->num_fc_ops; i++) { in r300_vertex_program_dump()
194 switch((vs->fc_ops >> (i * 2)) & 0x3 ) { in r300_vertex_program_dump()
203 vs->fc_op_addrs.r500[i].uw, in r300_vertex_program_dump()
[all …]
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| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_shader.c | 47 const struct etna_shader *vs, const struct etna_shader *fs) in etna_link_shaders() argument
51 assert(vs->processor == PIPE_SHADER_VERTEX); in etna_link_shaders()
56 etna_dump_shader(vs); in etna_link_shaders()
61 if (etna_link_shader(&link, vs, fs)) { in etna_link_shaders()
94 cs->VS_END_PC = vs->code_size / 4; in etna_link_shaders()
100 etna_bitarray_set(vs_output, 8, varid++, vs->vs_pos_out_reg); in etna_link_shaders()
103 if (vs->vs_pointsize_out_reg >= 0) in etna_link_shaders()
104 etna_bitarray_set(vs_output, 8, varid++, vs->vs_pointsize_out_reg); /* pointsize is last */ in etna_link_shaders()
109 if (vs->vs_pointsize_out_reg != -1) { in etna_link_shaders()
123 cs->VS_LOAD_BALANCING = vs->vs_load_balancing; in etna_link_shaders()
[all …]
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| /external/pdfium/third_party/agg23/ |
| D | agg_shorten_path.h | 23 void shorten_path(VertexSequence& vs, float s, unsigned closed = 0)
26 if(s > 0 && vs.size() > 1) {
28 int n = int(vs.size() - 2);
30 d = vs[n].dist;
34 vs.remove_last();
38 if(vs.size() < 2) {
39 vs.remove_all();
41 n = vs.size() - 1;
42 vertex_type& prev = vs[n - 1];
43 vertex_type& last = vs[n];
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| /external/mesa3d/src/gallium/drivers/virgl/ |
| D | virgl_buffer.c | 33 struct virgl_screen *vs = virgl_screen(screen); in virgl_buffer_destroy() local
37 vs->vws->resource_unref(vs->vws, vbuf->base.hw_res); in virgl_buffer_destroy()
49 struct virgl_screen *vs = virgl_screen(ctx->screen); in virgl_buffer_transfer_map() local
80 …vs->vws->transfer_get(vs->vws, vbuf->base.hw_res, box, trans->base.stride, trans->base.layer_strid… in virgl_buffer_transfer_map()
86 vs->vws->resource_wait(vs->vws, vbuf->base.hw_res); in virgl_buffer_transfer_map()
88 ptr = vs->vws->resource_map(vs->vws, vbuf->base.hw_res); in virgl_buffer_transfer_map()
108 struct virgl_screen *vs = virgl_screen(ctx->screen); in virgl_buffer_transfer_unmap() local
111 vs->vws->transfer_put(vs->vws, vbuf->base.hw_res, in virgl_buffer_transfer_unmap()
150 struct pipe_resource *virgl_buffer_create(struct virgl_screen *vs, in virgl_buffer_create() argument
159 buf->base.u.b.screen = &vs->base; in virgl_buffer_create()
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