| /external/llvm/test/CodeGen/X86/ |
| D | sse-minmax.ll | 136 ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
140 ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
144 ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
154 ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
158 ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
162 ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
172 ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
177 ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
181 ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1
192 ; CHECK-NEXT: xorp{{[sd]}} %xmm1, %xmm1
[all …]
|
| /external/iproute2/etc/iproute2/ |
| D | rt_protos | 15 14 xorp
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | vec_set-I.ll | 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xorp
|
| /external/v8/src/x64/ |
| D | macro-assembler-x64.cc | 1138 xorp(dst, kScratchRegister); in SafeMove()
1143 xorp(dst, Immediate(jit_cookie())); in SafeMove()
1157 xorp(Operand(rsp, 0), kScratchRegister); in SafePush()
1162 xorp(Operand(rsp, 0), Immediate(jit_cookie())); in SafePush()
1943 xorp(dst, src2); in SmiMul()
1967 xorp(kScratchRegister, src2); in SmiMul()
2105 xorp(dst, kScratchRegister); in SmiNot()
2162 xorp(dst, src2); in SmiXor()
2170 xorp(dst, constant_reg); in SmiXorConstant()
2173 xorp(dst, src); in SmiXorConstant()
[all …]
|
| /external/v8/src/regexp/x64/ |
| D | regexp-macro-assembler-x64.cc | 582 __ xorp(rax, Immediate(0x01)); in CheckSpecialCharacterClass() local
600 __ xorp(rax, Immediate(0x01)); in CheckSpecialCharacterClass() local
|
| /external/llvm/test/CodeGen/Hexagon/ |
| D | alu64.ll | 223 %0 = tail call i64 @llvm.hexagon.A2.xorp(i64 %Rs, i64 %Rt)
558 declare i64 @llvm.hexagon.A2.xorp(i64, i64) #1
|
| /external/llvm/test/CodeGen/Hexagon/intrinsics/ |
| D | xtype_alu.ll | 210 declare i64 @llvm.hexagon.A2.xorp(i64, i64)
212 %z = call i64 @llvm.hexagon.A2.xorp(i64 %a, i64 %b)
|
| /external/llvm/lib/Target/X86/ |
| D | README-SSE.txt | 115 Perhaps use pxor / xorp* to clear a XMM register first?
|
| D | X86InstrAVX512.td | 410 // Alias instruction that maps zero vector to pxor / xorp* for AVX-512.
|
| D | X86InstrSSE.td | 465 // Alias instruction that maps zero vector to pxor / xorp* for sse.
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | README-SSE.txt | 145 Perhaps use pxor / xorp* to clear a XMM register first?
|
| D | X86InstrSSE.td | 255 // Alias instruction that maps zero vector to pxor / xorp* for sse.
|
| /external/v8/src/crankshaft/x64/ |
| D | lithium-codegen-x64.cc | 1435 __ xorp(ToRegister(left), ToOperand(right)); in DoBitI() local
1463 __ xorp(ToRegister(left), ToRegister(right)); in DoBitI() local
5372 __ xorp(rsi, rsi); in DoDeferredLoadMutableDouble() local
|
| /external/v8/src/compiler/ia32/ |
| D | code-generator-ia32.cc | 357 __ xorp##SingleOrDouble(result_, result_); \
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 849 hexagon_A2_xorp, // llvm.hexagon.A2.xorp
6873 "llvm.hexagon.A2.xorp",
14758 1, // llvm.hexagon.A2.xorp
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 855 hexagon_A2_xorp, // llvm.hexagon.A2.xorp
6913 "llvm.hexagon.A2.xorp",
14853 1, // llvm.hexagon.A2.xorp
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 855 hexagon_A2_xorp, // llvm.hexagon.A2.xorp
6913 "llvm.hexagon.A2.xorp",
14853 1, // llvm.hexagon.A2.xorp
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 855 hexagon_A2_xorp, // llvm.hexagon.A2.xorp
6913 "llvm.hexagon.A2.xorp",
14853 1, // llvm.hexagon.A2.xorp
|