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/external/libxaac/decoder/armv7/
Dixheaacd_conv_ergtoamplitudelp.s36 LDRSH R6, [R2, #0]
39 MOVS R6, R6
43 CLZ R8, R6
46 MOV R6, R6, LSL R8
47 MOV R6, R6, ASR #5
48 AND R6, R6, R10
51 BIC R6, R6, #1
52 LDRH R12, [R6, R5]
61 LDRSH R6, [R3, #0]
65 MOVS R6, R6
[all …]
Dixheaacd_apply_rot.s33 LDRSH R6, [R11, #94]
36 ADD R9, R5, R6
43 LDRSH R6, [R11, #190]
46 ADD R9, R5, R6
52 LDRSH R6, [R11, #94]
55 ADD R9, R5, R6
63 LDRSH R6, [R11, #190]
66 ADD R9, R5, R6
82 LDR R6, [R12, #0x80]
86 SMULWB R10, R6, R8
[all …]
Dixheaacd_cos_sin_mod.s48 MOV R6, R7, LSL #3
66 SUB R6, R6, #4
67 ADD R9, R0, R6
72 ADD R11, R10, R6
94 SMULWB R6, R0, R2
100 QSUB R12, R12, R6
109 SMULWT R6, R0, R2
115 QSUB R12, R12, R6
126 SMULWB R6, R0, R2
131 QSUB R3, R3, R6
[all …]
Dixheaacd_conv_ergtoamplitude.s36 LDRSH R6, [R2], #2
40 MOVS R6, R6
42 CLZ R8, R6
45 MOV R11, R6, LSL R8
64 LDRSH R6, [R3], #2
68 MOVS R6, R6
70 CLZ R8, R6
73 MOV R11, R6, LSL R8
92 LDRSH R6, [R4], #2
96 MOVS R6, R6
[all …]
Dixheaacd_enery_calc_per_subband.s75 MOV R6, #0
79 MOV R6, #1
85 ORR R6, R6, R4
88 ORRGE R6, R6, R12
93 CLZ R6, R6
94 RSBS R14, R6, R10
95 MOV R6, #0
105 SMLABB R6, R4, R4, R6
107 SMLABB R6, R12, R12, R6
120 SMLABB R6, R4, R4, R6
[all …]
Dixheaacd_sbr_qmfanal32_winadds.s31 LDR R6, [SP, #112]
40 LDRSH r4 , [R6], r9
41 LDRSH r8 , [R6], r9
42 LDRSH r11 , [R6], r9
43 LDRSH r12 , [R6], r9
51 LDRSH r4 , [R6], r9
52 LDRSH r8 , [R6], r9
53 LDRSH r11 , [R6], r9
54 LDRSH r12 , [R6], r9
71 MOV R6, #64
[all …]
Dixheaacd_sbr_qmfanal32_winadds_eld.s9 LDR R6, [SP, #48] @timeIn
18 LDRSH r4 , [R6], r9
19 LDRSH r8 , [R6], r9
20 LDRSH r11 , [R6], r9
21 LDRSH r12 , [R6], r9
29 LDRSH r4 , [R6], r9
30 LDRSH r8 , [R6], r9
31 LDRSH r11 , [R6], r9
32 LDRSH r12 , [R6], r9
50 MOV R6, #64
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dsrem.ll2 ; RUN: -check-prefixes=ALL,GP32,NOT-R6,NOT-R2-R6
4 ; RUN: -check-prefixes=ALL,GP32,NOT-R6,NOT-R2-R6
6 ; RUN: -check-prefixes=ALL,GP32,R2-R5,R2-R6,NOT-R6
8 ; RUN: -check-prefixes=ALL,GP32,R2-R5,R2-R6,NOT-R6
10 ; RUN: -check-prefixes=ALL,GP32,R2-R5,R2-R6,NOT-R6
12 ; RUN: -check-prefixes=ALL,GP32,R6,R2-R6
15 ; RUN: -check-prefixes=ALL,GP64-NOT-R6,NOT-R6,NOT-R2-R6
17 ; RUN: -check-prefixes=ALL,GP64-NOT-R6,NOT-R6,NOT-R2-R6
19 ; RUN: -check-prefixes=ALL,GP64-NOT-R6,NOT-R6,NOT-R2-R6
21 ; RUN: -check-prefixes=ALL,R2-R5,R2-R6,GP64-NOT-R6,NOT-R6
[all …]
Durem.ll2 ; RUN: -check-prefixes=ALL,GP32,NOT-R6,NOT-R2-R6
4 ; RUN: -check-prefixes=ALL,GP32,NOT-R6,NOT-R2-R6
6 ; RUN: -check-prefixes=ALL,GP32,R2-R5,R2-R6,NOT-R6
8 ; RUN: -check-prefixes=ALL,GP32,R2-R5,R2-R6,NOT-R6
10 ; RUN: -check-prefixes=ALL,GP32,R2-R5,R2-R6,NOT-R6
12 ; RUN: -check-prefixes=ALL,GP32,R6,R2-R6
15 ; RUN: -check-prefixes=ALL,GP64-NOT-R6,NOT-R6,NOT-R2-R6
17 ; RUN: -check-prefixes=ALL,GP64-NOT-R6,NOT-R6,NOT-R2-R6
19 ; RUN: -check-prefixes=ALL,GP64-NOT-R6,NOT-R6,NOT-R2-R6
21 ; RUN: -check-prefixes=ALL,R2-R5,R2-R6,GP64-NOT-R6,NOT-R6
[all …]
Dshl.ll2 ; RUN: -check-prefixes=ALL,GP32,M2,NOT-R2-R6
4 ; RUN: -check-prefixes=ALL,GP32,NOT-R2-R6,32R1-R5
6 ; RUN: -check-prefixes=ALL,GP32,32R1-R5,R2-R6
8 ; RUN: -check-prefixes=ALL,GP32,32R1-R5,R2-R6
10 ; RUN: -check-prefixes=ALL,GP32,32R1-R5,R2-R6
12 ; RUN: -check-prefixes=ALL,GP32,32R6,R2-R6
14 ; RUN: -check-prefixes=ALL,GP64,M3,NOT-R2-R6
16 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6,NOT-R2-R6
18 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6,NOT-R2-R6
20 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6,R2-R6
[all …]
Dsdiv.ll2 ; RUN: -check-prefixes=ALL,NOT-R6,NOT-R2-R6,GP32
4 ; RUN: -check-prefixes=ALL,NOT-R6,NOT-R2-R6,GP32
6 ; RUN: -check-prefixes=ALL,NOT-R6,R2-R5,GP32
8 ; RUN: -check-prefixes=ALL,NOT-R6,R2-R5,GP32
10 ; RUN: -check-prefixes=ALL,NOT-R6,R2-R5,GP32
12 ; RUN: -check-prefixes=ALL,R6,GP32
15 ; RUN: -check-prefixes=ALL,NOT-R6,NOT-R2-R6,GP64-NOT-R6
17 ; RUN: -check-prefixes=ALL,NOT-R6,NOT-R2-R6,GP64-NOT-R6
19 ; RUN: -check-prefixes=ALL,NOT-R6,NOT-R2-R6,GP64-NOT-R6
21 ; RUN: -check-prefixes=ALL,NOT-R6,R2-R5,GP64-NOT-R6
[all …]
Dudiv.ll2 ; RUN: -check-prefixes=ALL,NOT-R6,GP32
4 ; RUN: -check-prefixes=ALL,NOT-R6,GP32
6 ; RUN: -check-prefixes=ALL,NOT-R6,GP32
8 ; RUN: -check-prefixes=ALL,NOT-R6,GP32
10 ; RUN: -check-prefixes=ALL,NOT-R6,GP32
12 ; RUN: -check-prefixes=ALL,R6,GP32
15 ; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
17 ; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
19 ; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
21 ; RUN: -check-prefixes=ALL,NOT-R6,GP64-NOT-R6
[all …]
Dashr.ll12 ; RUN: -check-prefixes=ALL,GP32,32R6
16 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
18 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
20 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
22 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
24 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
26 ; RUN: -check-prefixes=ALL,GP64,64R6
113 ; 32R6: srav $[[T0:[0-9]+]], $4, $7
114 ; 32R6: andi $[[T1:[0-9]+]], $7, 32
115 ; 32R6: seleqz $[[T2:[0-9]+]], $[[T0]], $[[T1]]
[all …]
Dlshr.ll12 ; RUN: -check-prefixes=ALL,GP32,32R6
16 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
18 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
20 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
22 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
24 ; RUN: -check-prefixes=ALL,GP64,GP64-NOT-R6
26 ; RUN: -check-prefixes=ALL,GP64,64R6
110 ; 32R6: srlv $[[T0:[0-9]+]], $5, $7
111 ; 32R6: not $[[T1:[0-9]+]], $7
112 ; 32R6: sll $[[T2:[0-9]+]], $4, 1
[all …]
Dmul.ll12 ; RUN: FileCheck %s -check-prefixes=ALL,32R6,GP32
14 ; RUN: FileCheck %s -check-prefixes=ALL,M4,GP64-NOT-R6
16 ; RUN: FileCheck %s -check-prefixes=ALL,64R1-R5,GP64-NOT-R6
18 ; RUN: FileCheck %s -check-prefixes=ALL,64R1-R5,GP64,GP64-NOT-R6
20 ; RUN: FileCheck %s -check-prefixes=ALL,64R1-R5,GP64,GP64-NOT-R6
22 ; RUN: FileCheck %s -check-prefixes=ALL,64R1-R5,GP64,GP64-NOT-R6
24 ; RUN: FileCheck %s -check-prefixes=ALL,64R6
30 ; RUN: FileCheck %s -check-prefix=64R6
45 ; 32R6: mul $[[T0:[0-9]+]], $4, $5
46 ; 32R6: sll $[[T0]], $[[T0]], 31
[all …]
Dret.ll10 …=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR32,NO-MTHC1,NOT-R6
11 …rch=mips -mcpu=mips32r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR32,MTHC1,NOT-R6
12 …rch=mips -mcpu=mips32r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR32,MTHC1,NOT-R6
13 …rch=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR32,MTHC1,NOT-R6
15 …rch=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR64,DMTC1,NOT-R6
16 …rch=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR64,DMTC1,NOT-R6
17 …rch=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR64,DMTC1,NOT-R6
18 …rch=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR64,DMTC1,NOT-R6
19 …rch=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,GPR64,DMTC1,NOT-R6
31 ; NOT-R6-DAG: jr $ra # <MCInst #{{[0-9]+}} JR
[all …]
Dadd.ll2 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP32
4 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP32
6 ; RUN: -check-prefixes=ALL,R2-R6,GP32
8 ; RUN: -check-prefixes=ALL,R2-R6,GP32
10 ; RUN: -check-prefixes=ALL,R2-R6,GP32
12 ; RUN: -check-prefixes=ALL,R2-R6,GP32
14 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP64
16 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP64
18 ; RUN: -check-prefixes=ALL,NOT-R2-R6,GP64
20 ; RUN: -check-prefixes=ALL,R2-R6,GP64
[all …]
Dindirectbr.ll3 …RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
4 …RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
5 …RUN: llc -march=mips -mcpu=mips32r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
6 …RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
8 …RUN: llc -march=mips64 -mcpu=mips4 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
9 …RUN: llc -march=mips64 -mcpu=mips64 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
10 …RUN: llc -march=mips64 -mcpu=mips64r2 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
11 …RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
12 …RUN: llc -march=mips64 -mcpu=mips64r5 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,NOT-R6
13 ; RUN: llc -march=mips64 -mcpu=mips64r6 -asm-show-inst < %s | FileCheck %s -check-prefixes=ALL,R6
[all …]
/external/llvm/test/CodeGen/Mips/
Dselect.ll3 …c < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32R6
6 …c < %s -march=mips64el -mcpu=mips64r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64R6
21 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
22 ; 32R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
23 ; 32R6: or $2, $[[T1]], $[[T0]]
31 ; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
32 ; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
33 ; 64R6: or $2, $[[T1]], $[[T0]]
58 ; 32R6-DAG: lw $[[F1:[0-9]+]], 16($sp)
59 ; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $4
[all …]
Dmadd-msub.ll3 ; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefixes=ALL,32R6
7 ; RUN: llc -march=mips -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s -check-prefixes=ALL,64R6
26 ; 32R6-DAG: mul $[[T0:[0-9]+]], ${{[45]}}, ${{[45]}}
27 ; 32R6-DAG: addu $[[T1:[0-9]+]], $[[T0]], $6
28 ; 32R6-DAG: sltu $[[T2:[0-9]+]], $[[T1]], $6
29 ; 32R6-DAG: sra $[[T3:[0-9]+]], $6, 31
30 ; 32R6-DAG: addu $[[T4:[0-9]+]], $[[T2]], $[[T3]]
31 ; 32R6-DAG: muh $[[T5:[0-9]+]], ${{[45]}}, ${{[45]}}
32 ; 32R6-DAG: addu $2, $[[T5]], $[[T4]]
41 ; 64R6-DAG: sll $[[T0:[0-9]+]], $4, 0
[all …]
Dzeroreg.ll3 …llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,32R6
7 …mipsel -mcpu=mips64r6 -target-abi n64 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,64R6
18 ; 32R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
19 ; 32R6: seleqz $2, $[[R0]], $4
24 ; 64R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
25 ; 64R6: seleqz $2, $[[R0]], $4
40 ; 32R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
41 ; 32R6: selnez $2, $[[R0]], $4
46 ; 64R6: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
47 ; 64R6: selnez $2, $[[R0]], $4
[all …]
Dfmadd1.ll10 …mcpu=mips32r6 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,32R6,32R6-NONAN
13 …mips64r6 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,64R6,64R6-NONAN
16 …llc < %s -march=mipsel -mcpu=mips32r6 | FileCheck %s -check-prefixes=ALL,32R6,32R6-NAN
19 … %s -march=mips64el -mcpu=mips64r6 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64R6,64R6-NAN
36 ; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
37 ; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
38 ; 32R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
39 ; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
40 ; 32R6-DAG: add.s $f0, $[[T1]], $[[T2]]
50 ; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
[all …]
Dmno-ldc1-sdc1.ll7 ; RUN: FileCheck %s -check-prefixes=ALL,32R6-LDC1
22 ; RUN: FileCheck %s -check-prefixes=ALL,32R6,32R6-LE,32R6-LE-PIC
39 ; RUN: FileCheck %s -check-prefixes=ALL,32R6,32R6-BE,32R6-BE-PIC
56 ; RUN: FileCheck %s -check-prefixes=ALL,32R6,32R6-LE,32R6-LE-STATIC
76 ; 32R6-LE-PIC-DAG: lw $[[R0:[0-9]+]], 0(${{[0-9]+}})
77 ; 32R6-LE-PIC-DAG: lw $[[R1:[0-9]+]], 4(${{[0-9]+}})
78 ; 32R6-LE-PIC-DAG: mtc1 $[[R0]], $f0
79 ; 32R6-LE-PIC-DAG: mthc1 $[[R1]], $f0
95 ; 32R6-LE-STATIC-DAG: lui $[[R0:[0-9]+]], %hi(g0)
96 ; 32R6-LE-STATIC-DAG: lw $[[R1:[0-9]+]], %lo(g0)($[[R0]])
[all …]
Dassertzext-trunc.ll2 ; RUN: FileCheck %s -check-prefixes=ALL,PRE-R6
4 ; RUN: FileCheck %s -check-prefixes=ALL,PRE-R6
6 ; RUN: FileCheck %s -check-prefixes=ALL,PRE-R6
8 ; RUN: FileCheck %s -check-prefixes=ALL,PRE-R6
10 ; RUN: FileCheck %s -check-prefixes=ALL,PRE-R6
12 ; RUN: FileCheck %s -check-prefixes=ALL,PRE-R6
14 ; RUN: FileCheck %s -check-prefixes=ALL,R6
22 ; PRE-R6-NOT: sll {{.*}}
23 ; PRE-R6: divu $zero, $4, $5
24 ; PRE-R6: teq $5, $zero, 7
[all …]
/external/boringssl/src/ssl/test/runner/poly1305/
Dsum_arm.s39 MOVM.IA (R7), [R2-R6]
44 AND R12, R6, R6
45 MOVM.IA.W [R2-R6], (R0)
50 EOR R6, R6, R6
51 MOVM.IA.W [R2-R6], (R0)
53 MOVM.IA [R2-R6], (R0)
84 EOR R6, R6, R6
85 MOVW.EQ $(1<<24), R6
86 MOVW R6, 84(R13)
123 ADD g, R6, R6
[all …]

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