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Searched refs:R_0286D4_SPI_INTERP_CONTROL_0 (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/drivers/r600/
Dr600d.h1532 #define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 macro
2280 #define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 macro
Devergreend.h1694 #define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 macro
Dr600_state.c543 r600_store_context_reg(&rs->buffer, R_0286D4_SPI_INTERP_CONTROL_0, spi_interp); in r600_create_rs_state()
Devergreen_state.c525 r600_store_context_reg(&rs->buffer, R_0286D4_SPI_INTERP_CONTROL_0, spi_interp); in evergreen_create_rs_state()
/external/mesa3d/src/amd/vulkan/
Dradv_cmd_buffer.c437 radeon_set_context_reg(cmd_buffer->cs, R_0286D4_SPI_INTERP_CONTROL_0, in radv_emit_graphics_raster_state()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state.c799 si_pm4_set_reg(pm4, R_0286D4_SPI_INTERP_CONTROL_0, in si_create_rs_state()
/external/mesa3d/src/amd/common/
Dsid.h6017 #define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 macro