| /external/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 69 LiveInterval::SubRange *SR; member
72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, in SubRangeInfo()
74 : ConEQ(LIS), SR(&SR), Index(Index) {} in SubRangeInfo()
161 for (LiveInterval::SubRange &SR : LI.subranges()) { in findComponents()
162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); in findComponents()
165 unsigned NumSubComponents = ConEQ.Classify(SR); in findComponents()
186 const LiveInterval::SubRange &SR = *SRInfo.SR; in findComponents() local
187 if ((SR.LaneMask & LaneMask) == 0) in findComponents()
192 const VNInfo *VNI = SR.getVNInfoAt(Pos); in findComponents()
230 const LiveInterval::SubRange &SR = *SRInfo.SR; in rewriteOperands() local
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| D | VirtRegMap.cpp | 254 for (const LiveInterval::SubRange &SR : LI.subranges()) { in addLiveInsForSubRanges() local
255 SubRanges.push_back(std::make_pair(&SR, SR.begin())); in addLiveInsForSubRanges()
256 if (!First.isValid() || SR.segments.front().start < First) in addLiveInsForSubRanges()
257 First = SR.segments.front().start; in addLiveInsForSubRanges()
258 if (!Last.isValid() || SR.segments.back().end > Last) in addLiveInsForSubRanges()
259 Last = SR.segments.back().end; in addLiveInsForSubRanges()
271 const LiveInterval::SubRange *SR = RangeIterPair.first; in addLiveInsForSubRanges() local
273 while (SRI != SR->end() && SRI->end <= MBBBegin) in addLiveInsForSubRanges()
275 if (SRI == SR->end()) in addLiveInsForSubRanges()
278 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
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| D | MachineCopyPropagation.cpp | 90 for (MCSubRegIterator SR(Reg, &TRI, true); SR.isValid(); ++SR) in removeRegsFromMap() local
91 Map.erase(*SR); in removeRegsFromMap()
239 for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid(); in CopyPropagateBlock() local
240 ++SR) { in CopyPropagateBlock()
241 CopyMap[*SR] = MI; in CopyPropagateBlock()
242 AvailCopyMap[*SR] = MI; in CopyPropagateBlock()
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| D | DeadMachineInstructionElim.cpp | 151 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); in runOnMachineFunction() local
152 SR.isValid(); ++SR) in runOnMachineFunction()
153 LivePhysRegs.reset(*SR); in runOnMachineFunction()
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| D | LiveIntervalAnalysis.cpp | 507 void LiveIntervals::shrinkToUses(LiveInterval::SubRange &SR, unsigned Reg) in shrinkToUses() argument
509 DEBUG(dbgs() << "Shrink: " << SR << '\n'); in shrinkToUses()
525 if ((LaneMask & SR.LaneMask) == 0) in shrinkToUses()
534 LiveQueryResult LRQ = SR.Query(Idx); in shrinkToUses()
551 createSegmentsForValues(NewLR, make_range(SR.vni_begin(), SR.vni_end())); in shrinkToUses()
552 extendSegmentsToUses(NewLR, *Indexes, WorkList, SR); in shrinkToUses()
555 SR.segments.swap(NewLR.segments); in shrinkToUses()
558 for (auto VNI : SR.valnos) { in shrinkToUses()
561 const LiveRange::Segment *Segment = SR.getSegmentContaining(VNI->def); in shrinkToUses()
569 SR.removeSegment(*Segment); in shrinkToUses()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 114 // sub / add which can clobber SR.
115 let Defs = [SP, SR], Uses = [SP] in {
133 let Defs = [SR] in {
195 let Uses = [SR] in
210 let Defs = [R12, R13, R14, R15, SR],
340 let Defs = [SR] in {
348 (implicit SR)]>;
353 (implicit SR)]>;
360 (implicit SR)]>;
365 (implicit SR)]>;
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| /external/llvm/test/CodeGen/Mips/ |
| D | helloworld.ll | 7 …inux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
18 ; SR: .set mips16
22 ; SR-NOT: .set noreorder
23 ; SR-NOT: .set nomacro
24 ; SR-NOT: .set noat
28 ; SR: save $ra, 24 # 16 bit inst
39 ; SR: restore $ra, 24 # 16 bit inst
50 ; SR-NOT: .set at
51 ; SR-NOT: .set macro
52 ; SR-NOT: .set reorder
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| /external/elfutils/backends/ |
| D | i386_corenote.c | 47 #define SR(at, n, dwreg) \ macro
55 SR (7, 1, 43), /* %ds */
56 SR (8, 1, 40), /* %es */
57 SR (9, 1, 44), /* %fs */
58 SR (10, 1, 45), /* %gs */
61 SR (13, 1, 41), /* %cs */
64 SR (16, 1, 42), /* %ss */
67 #undef SR
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| D | x86_64_corenote.c | 54 #define SR(at, n, dwreg) \ macro
73 SR (17,1, 51), /* %cs */
76 SR (20,1, 52), /* %ss */
78 SR (23,1, 53), /* %ds */
79 SR (24,1, 50), /* %es */
80 SR (25,2, 54), /* %fs-%gs */
83 #undef SR
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfExpression.cpp | 104 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local
105 Reg = TRI.getDwarfRegNum(*SR, false); in AddMachineRegPiece()
107 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); in AddMachineRegPiece()
137 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local
138 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); in AddMachineRegPiece()
141 Reg = TRI.getDwarfRegNum(*SR, false); in AddMachineRegPiece()
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| /external/llvm/test/CodeGen/XCore/ |
| D | epilogue_prologue.ll | 4 ; When using SP for small frames, we don't need any scratch registers (SR).
8 ; FP + small frame: spill FP+SR = entsp 2
29 ; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1
62 ; FP + large frame: spill FP+SR = entsp 2 + 100000
83 ; !FP + large frame: spill SR+SR = entsp 2 + 100000
102 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1
155 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000
209 ; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1
223 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 256
237 ; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1
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| /external/webrtc/webrtc/modules/rtp_rtcp/source/ |
| D | rtcp_utility.cc | 575 _packet.SR.SenderSSRC = *_ptrRTCPData++ << 24; in ParseSR()
576 _packet.SR.SenderSSRC += *_ptrRTCPData++ << 16; in ParseSR()
577 _packet.SR.SenderSSRC += *_ptrRTCPData++ << 8; in ParseSR()
578 _packet.SR.SenderSSRC += *_ptrRTCPData++; in ParseSR()
580 _packet.SR.NTPMostSignificant = *_ptrRTCPData++ << 24; in ParseSR()
581 _packet.SR.NTPMostSignificant += *_ptrRTCPData++ << 16; in ParseSR()
582 _packet.SR.NTPMostSignificant += *_ptrRTCPData++ << 8; in ParseSR()
583 _packet.SR.NTPMostSignificant += *_ptrRTCPData++; in ParseSR()
585 _packet.SR.NTPLeastSignificant = *_ptrRTCPData++ << 24; in ParseSR()
586 _packet.SR.NTPLeastSignificant += *_ptrRTCPData++ << 16; in ParseSR()
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| /external/llvm/lib/Target/Hexagon/ |
| D | RDFCopy.cpp | 67 RegisterRef SR = { I.Reg, I.SubReg }; in interpretAsCopy() local
68 EM.insert(std::make_pair(DR, SR)); in interpretAsCopy()
187 RegisterRef SR = FR->second; in run() local
188 if (DR == SR) in run()
191 auto &RDefSR = RDefMap[SR]; in run()
213 << " with " << Print<RegisterRef>(SR, DFG) << " in " in run()
217 Op.setReg(SR.Reg); in run()
218 Op.setSubReg(SR.Sub); in run()
241 J.second = SR; in run()
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| D | HexagonGenExtract.cpp | 152 uint32_t SR = CSR->getZExtValue(); in INITIALIZE_PASS_DEPENDENCY() local
159 if (!LogicalSR && (SR > SL)) in INITIALIZE_PASS_DEPENDENCY()
161 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL); in INITIALIZE_PASS_DEPENDENCY()
172 uint32_t U = BW - std::max(SL, SR); in INITIALIZE_PASS_DEPENDENCY()
203 Value *NewIn = IRB.CreateCall(ExtF, {BF, IRB.getInt32(W), IRB.getInt32(SR)}); in INITIALIZE_PASS_DEPENDENCY()
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| /external/clang/tools/libclang/ |
| D | CXLoadedDiagnostic.cpp | 210 CXSourceRange &SR);
294 CXSourceRange &SR) { in readRange() argument
307 SR = clang_getRange(startLoc, endLoc); in readRange()
356 CXSourceRange SR; in visitSourceRangeRecord() local
357 if (std::error_code EC = readRange(Start, End, SR)) in visitSourceRangeRecord()
359 CurrentDiags.back()->Ranges.push_back(SR); in visitSourceRangeRecord()
367 CXSourceRange SR; in visitFixitRecord() local
368 if (std::error_code EC = readRange(Start, End, SR)) in visitFixitRecord()
374 std::make_pair(SR, TopDiags->copyString(CodeToInsert))); in visitFixitRecord()
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| /external/valgrind/coregrind/m_syswrap/ |
| D | priv_syswrap-generic.h | 240 #define SR SysRes macro
243 extern SysRes ML_(generic_POST_sys_socketpair) ( TId, SR, UW, UW, UW, UW );
244 extern SysRes ML_(generic_POST_sys_socket) ( TId, SR );
247 extern SysRes ML_(generic_POST_sys_accept) ( TId, SR, UW, UW, UW );
251 extern void ML_(generic_POST_sys_recvfrom) ( TId, SR, UW, UW, UW, UW, UW, UW );
257 extern void ML_(generic_POST_sys_getsockname) ( TId, SR, UW, UW, UW );
259 extern void ML_(generic_POST_sys_getpeername) ( TId, SR, UW, UW, UW );
302 #undef SR
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| D | priv_syswrap-linux-variants.h | 43 #define SR SysRes macro
52 #undef SR
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| /external/clang/lib/StaticAnalyzer/Checkers/ |
| D | TestAfterDivZeroChecker.cpp | 149 SymbolRef SR = Var.getAsSymbol(); in setDivZeroMap() local
150 if (!SR) in setDivZeroMap()
155 State->add<DivZeroMap>(ZeroState(SR, C.getBlockID(), C.getStackFrame())); in setDivZeroMap()
161 SymbolRef SR = Var.getAsSymbol(); in hasDivZeroMap() local
162 if (!SR) in hasDivZeroMap()
165 ZeroState ZS(SR, C.getBlockID(), C.getStackFrame()); in hasDivZeroMap()
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| D | UnreachableCodeChecker.cpp | 146 SourceRange SR; in checkEndAnalysis() local
150 SR = S->getSourceRange(); in checkEndAnalysis()
153 if (SR.isInvalid() || !SL.isValid()) in checkEndAnalysis()
165 "This statement is never executed", DL, SR); in checkEndAnalysis()
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| D | CastSizeChecker.cpp | 108 const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R); in checkPreStmt() local
109 if (!SR) in checkPreStmt()
113 SVal extent = SR->getExtent(svalBuilder); in checkPreStmt()
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| /external/clang/lib/AST/ |
| D | ExprObjC.cpp | 21 ObjCMethodDecl *Method, SourceRange SR) in ObjCArrayLiteral() argument
24 NumElements(Elements.size()), Range(SR), ArrayWithObjectsMethod(Method) { in ObjCArrayLiteral()
41 SourceRange SR) { in Create() argument
43 return new (Mem) ObjCArrayLiteral(Elements, T, Method, SR); in Create()
56 SourceRange SR) in ObjCDictionaryLiteral() argument
59 NumElements(VK.size()), HasPackExpansions(HasPackExpansions), Range(SR), in ObjCDictionaryLiteral()
92 ObjCMethodDecl *method, SourceRange SR) { in Create() argument
95 return new (Mem) ObjCDictionaryLiteral(VK, HasPackExpansions, T, method, SR); in Create()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | VirtRegRewriter.cpp | 492 for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { in ResurrectConfirmedKill() local
493 DEBUG(dbgs() << " Resurrect subreg " << TRI->getName(*SR) << "\n"); in ResurrectConfirmedKill()
495 assert(KillOps[*SR]->getParent() == KillOp->getParent() && in ResurrectConfirmedKill()
497 KillOps[*SR] = NULL; in ResurrectConfirmedKill()
498 RegKills.reset(*SR); in ResurrectConfirmedKill()
532 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { in ResurrectKill() local
533 unsigned SReg = *SR; in ResurrectKill()
560 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR) { in InvalidateKills() local
561 if (RegKills[*SR]) { in InvalidateKills()
562 assert(KillOps[*SR] == &MO && "bad subreg kill flags"); in InvalidateKills()
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| /external/clang/lib/StaticAnalyzer/Core/ |
| D | SVals.cpp | 41 if (const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R)) { in hasConjuredSymbol() local
42 SymbolRef sym = SR->getSymbol(); in hasConjuredSymbol()
93 while (const SubRegion *SR = dyn_cast<SubRegion>(R)) { in getLocSymbolInBase() local
94 if (const SymbolicRegion *SymR = dyn_cast<SymbolicRegion>(SR)) in getLocSymbolInBase()
97 R = SR->getSuperRegion(); in getLocSymbolInBase()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 270 unsigned SR = getScratchReg(); in duplicatePendingSTBeforeKill() local
272 << " in FP" << RegNo << " to FP" << SR << '\n'); in duplicatePendingSTBeforeKill()
273 duplicateToTop(RegNo, SR, I); in duplicatePendingSTBeforeKill()
274 PendingST[i] = SR; in duplicatePendingSTBeforeKill()
1347 unsigned SR = getScratchReg(); in handleSpecialFP() local
1348 PendingST[DstST] = SR; in handleSpecialFP()
1349 Stack[Slot] = SR; in handleSpecialFP()
1350 RegMap[SR] = Slot; in handleSpecialFP()
1555 unsigned SR = getScratchReg(); in handleSpecialFP() local
1556 duplicateToTop(PendingST[i], SR, I); in handleSpecialFP()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 206 CodeGenRegister *SR = I->second; in inheritRegUnits() local
208 changed |= (RegUnits |= SR->RegUnits); in inheritRegUnits()
225 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
227 if (!SubRegs.insert(std::make_pair(Idx, SR)).second) in computeSubRegs()
232 SubReg2Idx.insert(std::make_pair(SR, Idx)); in computeSubRegs()
241 CodeGenRegister *SR = ExplicitSubRegs[i]; in computeSubRegs() local
242 const SubRegMap &Map = SR->computeSubRegs(RegBank); in computeSubRegs()
243 HasDisjunctSubRegs |= SR->HasDisjunctSubRegs; in computeSubRegs()
260 CodeGenRegister *SR = SubRegs[Idx]; in computeSubRegs() local
261 const SubRegMap &Map = SR->computeSubRegs(RegBank); in computeSubRegs()
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