Searched refs:V2S (Results 1 – 7 of 7) sorted by relevance
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 617 __ abs(v27.V2S(), v25.V2S()); in GenerateTestSequenceNEON()
625 __ add(v15.V2S(), v14.V2S(), v19.V2S()); in GenerateTestSequenceNEON()
630 __ addhn(v10.V2S(), v14.V2D(), v15.V2D()); in GenerateTestSequenceNEON()
639 __ addp(v22.V2S(), v30.V2S(), v26.V2S()); in GenerateTestSequenceNEON()
652 __ bic(v7.V2S(), 0xe4, 16); in GenerateTestSequenceNEON()
664 __ cls(v21.V2S(), v0.V2S()); in GenerateTestSequenceNEON()
670 __ clz(v27.V2S(), v17.V2S()); in GenerateTestSequenceNEON()
681 __ cmeq(v2.V2S(), v3.V2S(), v9.V2S()); in GenerateTestSequenceNEON()
682 __ cmeq(v16.V2S(), v25.V2S(), 0); in GenerateTestSequenceNEON()
697 __ cmge(v25.V2S(), v22.V2S(), v3.V2S()); in GenerateTestSequenceNEON()
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| D | test-disasm-aarch64.cc | 3088 V(V2S(), "2s") \
3094 V(V2S(), "2s", V4H(), "4h") \
3095 V(V1D(), "1d", V2S(), "2s") \
3103 V(V2D(), "2d", V2S(), "2s")
3115 V(V2S(), "2s") \
3121 V(V2S(), "2s") \
3178 COMPARE_MACRO(Ld1(v16.V2S(), in TEST()
3179 v17.V2S(), in TEST()
3180 v18.V2S(), in TEST()
3188 COMPARE_MACRO(Ld1(v19.V2S(), in TEST()
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| D | test-assembler-aarch64.cc | 3168 __ Ld1(v16.V2S(), v17.V2S(), v18.V2S(), v19.V2S(), MemOperand(x17)); in TEST()
3170 __ Ld1(v30.V2S(), v31.V2S(), v0.V2S(), v1.V2S(), MemOperand(x17)); in TEST()
3221 __ Ld1(v16.V2S(), in TEST()
3222 v17.V2S(), in TEST()
3223 v18.V2S(), in TEST()
3224 v19.V2S(), in TEST()
3226 __ Ld1(v30.V2S(), in TEST()
3227 v31.V2S(), in TEST()
3228 v0.V2S(), in TEST()
3229 v1.V2S(), in TEST()
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| /external/vixl/src/aarch64/ |
| D | operands-aarch64.h | 365 VRegister V2S() const { return VRegister(code_, kDRegSize, 2); } in V2S() function
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| D | macro-assembler-aarch64.cc | 1067 Movi32bitHelper(vd.Is64Bits() ? vd.V2S() : vd.V4S(), imm & 0xffffffff); in Movi64bitHelper()
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| /external/lisa/ipynb/examples/trace_analysis/ |
| D | TraceAnalysis_FunctionsProfiling.ipynb | 759 …\n+Pd7mddFmAsAAACwjsxK8pcko1NWnv4xyUa1bS9K8niS/9dkv9Epq1K/UDf2kiT/kuT+JM8m+V2S\nc5KMbNi36yvZR6es8n…
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 8400 SDValue V2S = getScalarValueForVectorElement(V2, Mask[V2Index] - Mask.size(), in lowerVectorShuffleAsElementInsertion() local
8402 if (V2S && DAG.getTargetLoweringInfo().isTypeLegal(V2S.getValueType())) { in lowerVectorShuffleAsElementInsertion()
8404 V2S = DAG.getBitcast(EltVT, V2S); in lowerVectorShuffleAsElementInsertion()
8413 V2S = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, V2S); in lowerVectorShuffleAsElementInsertion()
8415 V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, ExtVT, V2S); in lowerVectorShuffleAsElementInsertion()
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