Home
last modified time | relevance | path

Searched refs:t4 (Results 1 – 25 of 592) sorted by relevance

12345678910>>...24

/external/valgrind/none/tests/mips32/
Dmips32_dsp.c559 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t1", 0xfabc2435, t4, t1); in main()
562 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t2, $t4", 0xffffffff, t2, t4); in main()
564 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t4", 0x00000555, t4, t4); in main()
567 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t1", 0x980b7cde, t4, t1); in main()
570 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t2, $t4", 0x55555555, t2, t4); in main()
572 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t4", 0x734680bc, t4, t4); in main()
575 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t1", 0xdba38ec9, t4, t1); in main()
578 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t2, $t4", 0x00086755, t2, t4); in main()
580 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t4", 0xeeeeeeee, t4, t4); in main()
583 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t4, $t1", 0x93474bde, t4, t1); in main()
[all …]
Dmips32_dspr2.c552 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t1", 0xfabc2435, t4, t1); in main()
555 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t2, $t4", 0xffffffff, t2, t4); in main()
557 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t4", 0x00000555, t4, t4); in main()
560 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t1", 0x980b7cde, t4, t1); in main()
563 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t2, $t4", 0x55555555, t2, t4); in main()
565 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t4", 0x734680bc, t4, t4); in main()
568 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t1", 0xdecadeca, t4, t1); in main()
571 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t2, $t4", 0x00086755, t2, t4); in main()
573 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t4", 0xeeeeeeee, t4, t4); in main()
576 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t4, $t1", 0x93474bde, t4, t1); in main()
[all …]
Dmips32_dsp.stdout.exp-LE4 absq_s.ph $t4, $t1 :: rd 0x05442435 rt 0xfabc2435 DSPControl 0x0
7 absq_s.ph $t2, $t4 :: rd 0x00010001 rt 0xffffffff DSPControl 0x0
9 absq_s.ph $t4, $t4 :: rd 0x00000555 rt 0x00000555 DSPControl 0x0
12 absq_s.ph $t4, $t1 :: rd 0x67f57cde rt 0x980b7cde DSPControl 0x0
15 absq_s.ph $t2, $t4 :: rd 0x55555555 rt 0x55555555 DSPControl 0x0
17 absq_s.ph $t4, $t4 :: rd 0x73467f44 rt 0x734680bc DSPControl 0x0
20 absq_s.ph $t4, $t1 :: rd 0x245d7137 rt 0xdba38ec9 DSPControl 0x0
23 absq_s.ph $t2, $t4 :: rd 0x00086755 rt 0x00086755 DSPControl 0x0
25 absq_s.ph $t4, $t4 :: rd 0x11121112 rt 0xeeeeeeee DSPControl 0x0
28 absq_s.ph $t4, $t1 :: rd 0x6cb94bde rt 0x93474bde DSPControl 0x0
[all …]
Dmips32_dsp.stdout.exp-BE4 absq_s.ph $t4, $t1 :: rd 0x05442435 rt 0xfabc2435 DSPControl 0x0
7 absq_s.ph $t2, $t4 :: rd 0x00010001 rt 0xffffffff DSPControl 0x0
9 absq_s.ph $t4, $t4 :: rd 0x00000555 rt 0x00000555 DSPControl 0x0
12 absq_s.ph $t4, $t1 :: rd 0x67f57cde rt 0x980b7cde DSPControl 0x0
15 absq_s.ph $t2, $t4 :: rd 0x55555555 rt 0x55555555 DSPControl 0x0
17 absq_s.ph $t4, $t4 :: rd 0x73467f44 rt 0x734680bc DSPControl 0x0
20 absq_s.ph $t4, $t1 :: rd 0x245d7137 rt 0xdba38ec9 DSPControl 0x0
23 absq_s.ph $t2, $t4 :: rd 0x00086755 rt 0x00086755 DSPControl 0x0
25 absq_s.ph $t4, $t4 :: rd 0x11121112 rt 0xeeeeeeee DSPControl 0x0
28 absq_s.ph $t4, $t1 :: rd 0x6cb94bde rt 0x93474bde DSPControl 0x0
[all …]
Dbranches.c290 TESTINST1(10, t4); in main()
316 TESTINST2(10, t4); in main()
342 TESTINST3(10, t4); in main()
366 TESTINST4("beq", 8, 125, 125, t2, t3, t4); in main()
367 TESTINST4("beq", 9, 0x80000000, 0x80000000, t3, t4, t5); in main()
368 TESTINST4("beq", 10, 0xffffffff, 0x80000000, t4, t5, t6); in main()
384 TESTINST4("bne", 8, 125, 125, t2, t3, t4); in main()
385 TESTINST4("bne", 9, 0x80000000, 0x80000000, t3, t4, t5); in main()
386 TESTINST4("bne", 10, 0xffffffff, 0x80000000, t4, t5, t6); in main()
403 TESTINST5("beqz", 9, 0x80000000, t3, t4); in main()
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/mips/
Dn32.S78 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
79 and v0, t4, -2 * FFI_SIZEOF_ARG # to a proper boundry.
110 and t4, t6, ((1<<FFI_FLAG_BITS)-1)
112 beqz t4, arg1_next
113 bne t4, FFI_TYPE_FLOAT, arg1_doublep
120 SRL t4, t6, 1*FFI_FLAG_BITS
121 and t4, ((1<<FFI_FLAG_BITS)-1)
123 beqz t4, arg2_next
124 bne t4, FFI_TYPE_FLOAT, arg2_doublep
131 SRL t4, t6, 2*FFI_FLAG_BITS
[all …]
/external/libffi/src/mips/
Dn32.S78 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
79 and v0, t4, -2 * FFI_SIZEOF_ARG # to a proper boundry.
110 and t4, t6, ((1<<FFI_FLAG_BITS)-1)
112 beqz t4, arg1_next
113 bne t4, FFI_TYPE_FLOAT, arg1_doublep
120 SRL t4, t6, 1*FFI_FLAG_BITS
121 and t4, ((1<<FFI_FLAG_BITS)-1)
123 beqz t4, arg2_next
124 bne t4, FFI_TYPE_FLOAT, arg2_doublep
131 SRL t4, t6, 2*FFI_FLAG_BITS
[all …]
/external/python/cpython3/Modules/_ctypes/libffi/src/mips/
Dn32.S78 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
79 and v0, t4, -2 * FFI_SIZEOF_ARG # to a proper boundry.
110 and t4, t6, ((1<<FFI_FLAG_BITS)-1)
112 beqz t4, arg1_next
113 bne t4, FFI_TYPE_FLOAT, arg1_doublep
120 SRL t4, t6, 1*FFI_FLAG_BITS
121 and t4, ((1<<FFI_FLAG_BITS)-1)
123 beqz t4, arg2_next
124 bne t4, FFI_TYPE_FLOAT, arg2_doublep
131 SRL t4, t6, 2*FFI_FLAG_BITS
[all …]
/external/speex/libspeex/
Dsmallft.c119 int t0,t1,t2,t3,t4,t5,t6; in dradf2() local
138 t4=(t1<<1)+(ido<<1); in dradf2()
143 t4-=2; in dradf2()
149 ch[t4]=ti2-cc[t5]; in dradf2()
151 ch[t4-1]=cc[t5-1]-tr2; in dradf2()
174 int i,k,t0,t1,t2,t3,t4,t5,t6; in dradf4() local
179 t4=t1<<1; in dradf4()
185 tr2=cc[t3]+cc[t4]; in dradf4()
189 ch[(t5+=(ido<<1))-1]=cc[t3]-cc[t4]; in dradf4()
195 t4+=ido; in dradf4()
[all …]
/external/libjpeg-turbo/simd/
Djsimd_mips_dspr2.S56 sll t4, a3, 2
57 lwx t5, t4(t5) // t5 = outptr = output_buf[ci][output_row]
69 addu t4, t2, s0
70 addu t7, t4, s0
73 lbu t4, 0(t4)
78 sb t4, -3(t5)
98 sll t4, a3, 2
99 lwx t5, t4(t5) // t5 = outptr = output_buf[ci][output_row]
105 addu t4, t2, s0
106 addu t7, t4, s0
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/MSP430/
Dbit.ll39 %t4 = zext i1 %t3 to i8
40 ret i8 %t4
49 %t4 = zext i1 %t3 to i8
50 ret i8 %t4
59 %t4 = zext i1 %t3 to i8
60 ret i8 %t4
69 %t4 = zext i1 %t3 to i8
70 ret i8 %t4
79 %t4 = icmp ne i8 %t3, 0
80 %t5 = zext i1 %t4 to i8
[all …]
/external/llvm/test/CodeGen/MSP430/
Dbit.ll39 %t4 = zext i1 %t3 to i8
40 ret i8 %t4
49 %t4 = zext i1 %t3 to i8
50 ret i8 %t4
59 %t4 = zext i1 %t3 to i8
60 ret i8 %t4
69 %t4 = zext i1 %t3 to i8
70 ret i8 %t4
79 %t4 = icmp ne i8 %t3, 0
80 %t5 = zext i1 %t4 to i8
[all …]
/external/boringssl/src/crypto/fipsmodule/ec/asm/
Dp256-x86_64-asm.pl82 my ($t0,$t1,$t2,$t3,$t4)=("%rax","%rdx","%rcx","%r12","%r13");
100 xor $t4, $t4
109 sbb \$0, $t4
117 test $t4, $t4
137 my ($t0,$t1,$t2,$t3,$t4)=("%rcx","%rbp","%rbx","%rdx","%rax");
853 mulx %rdx, $t0, $t4
861 adox $t4, $acc3
867 mulx %rdx, $t0, $t4
871 adox $t4, $acc7
872 shrx $a_ptr, $acc0, $t4
[all …]
/external/llvm/test/Transforms/LoopStrengthReduce/
Daddress-space-loop.ll20 %t = add i16 %t4, 1 ; <i16> [#uses=1]
24 %t4 = phi i16 [ %t, %bb2 ], [ 0, %bb ] ; <i16> [#uses=3]
28 ; CHECK-NEXT: %t7 = icmp eq i16 %t4, 0
30 ; CHECK-NEXT: [[SCEVGEP:%[^ ]+]] = getelementptr i8, i8 addrspace(1)* undef, i16 %t4
33 %t7 = icmp eq i16 %t4, 0 ; <i1> [#uses=1]
34 %t3 = add i16 %t4, 16 ; <i16> [#uses=1]
43 ; Use the induction variable (%t4) to access the right element
44 ; CHECK-NEXT: [[ADDRESS:%[^ ]+]] = getelementptr i8, i8 addrspace(1)* [[SCEVGEP2]], i16 %t4
48 %t2 = getelementptr inbounds i8, i8 addrspace(1)* undef, i16 %t4 ; <i8*> [#uses=1]
Duglygep-address-space.ll20 %t = add i16 %t4, 1 ; <i16> [#uses=1]
24 %t4 = phi i16 [ %t, %bb2 ], [ 0, %bb ] ; <i16> [#uses=3]
28 ; CHECK-NEXT: %t7 = icmp eq i16 %t4, 0
30 ; CHECK-NEXT: [[SCEVGEP:%[^ ]+]] = getelementptr i8, i8 addrspace(1)* undef, i16 %t4
33 %t7 = icmp eq i16 %t4, 0 ; <i1> [#uses=1]
34 %t3 = add i16 %t4, 16 ; <i16> [#uses=1]
43 ; Use the induction variable (%t4) to access the right element
44 ; CHECK-NEXT: [[ADDRESS:%[^ ]+]] = getelementptr i8, i8 addrspace(1)* [[SCEVGEP2]], i16 %t4
48 %t2 = getelementptr inbounds i8, i8 addrspace(1)* undef, i16 %t4 ; <i8*> [#uses=1]
/external/llvm/test/Transforms/InstCombine/
Dsigned-comparison.ll6 define i1 @scalar_zext_slt(i16 %t4) {
8 ; CHECK-NEXT: [[T6:%.*]] = icmp ult i16 %t4, 500
11 %t5 = zext i16 %t4 to i32
16 define <4 x i1> @vector_zext_slt(<4 x i16> %t4) {
18 ; CHECK-NEXT: [[T6:%.*]] = icmp ult <4 x i16> %t4, <i16 500, i16 0, i16 501, i16 -1>
21 %t5 = zext <4 x i16> %t4 to <4 x i32>
/external/clang/test/CXX/except/except.spec/
Dp5-pointers.cpp48 void (*t4)() throw(A) = &s1; // valid in fnptrs()
49 t4 = &s3; // valid in fnptrs()
50 t4 = &s4; // valid in fnptrs()
51 …t4 = &s5; // expected-error {{not superset}} expected-error {{incompatible ty… in fnptrs()
59 …t6 = t4; // expected-error {{not superset}} expected-error {{incompatible ty… in fnptrs()
60 t4 = t6; // valid in fnptrs()
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dmasked-iv-unsafe.ll22 %t4 = load double* %t3
23 %t5 = fmul double %t4, 2.3
50 %t4 = load double* %t3
51 %t5 = fmul double %t4, 2.3
80 %t4 = load double* %t3
81 %t5 = fmul double %t4, 2.3
110 %t4 = load double* %t3
111 %t5 = fmul double %t4, 2.3
138 %t4 = load double* %t3
139 %t5 = fmul double %t4, 2.3
[all …]
Dmasked-iv-safe.ll27 %t4 = load double* %t3
28 %t5 = fmul double %t4, 2.3
55 %t4 = load double* %t3
56 %t5 = fmul double %t4, 2.3
85 %t4 = load double* %t3
86 %t5 = fmul double %t4, 2.3
115 %t4 = load double* %t3
116 %t5 = fmul double %t4, 2.3
143 %t4 = load double* %t3
144 %t5 = fmul double %t4, 2.3
[all …]
/external/llvm/test/CodeGen/X86/
Dmasked-iv-unsafe.ll22 %t4 = load double, double* %t3
23 %t5 = fmul double %t4, 2.3
50 %t4 = load double, double* %t3
51 %t5 = fmul double %t4, 2.3
80 %t4 = load double, double* %t3
81 %t5 = fmul double %t4, 2.3
110 %t4 = load double, double* %t3
111 %t5 = fmul double %t4, 2.3
138 %t4 = load double, double* %t3
139 %t5 = fmul double %t4, 2.3
[all …]
Dmasked-iv-safe.ll24 %t4 = load double, double* %t3
25 %t5 = fmul double %t4, 2.3
57 %t4 = load double, double* %t3
58 %t5 = fmul double %t4, 2.3
92 %t4 = load double, double* %t3
93 %t5 = fmul double %t4, 2.3
127 %t4 = load double, double* %t3
128 %t5 = fmul double %t4, 2.3
160 %t4 = load double, double* %t3
161 %t5 = fmul double %t4, 2.3
[all …]
/external/python/cpython2/Lib/test/
Dtest_fileinput.py75 t4 = writeTmp(4, ["Line %s of file 4\n" % (i+1) for i in range(1)])
76 self.buffer_size_test(t1, t2, t3, t4, bs, round)
78 remove_tempfiles(t1, t2, t3, t4)
80 def buffer_size_test(self, t1, t2, t3, t4, bs=0, round=0): argument
86 fi = FileInput(files=(t1, t2, t3, t4), bufsize=bs)
93 self.assertEqual(fi.filename(), t4)
97 fi = FileInput(files=(t1, t2, t3, t4), bufsize=bs)
116 fi = FileInput(files=(t1, t2, t3, t4, '-'), bufsize=bs)
130 fi = FileInput(files=(t1, t2, t3, t4), bufsize=bs)
141 fi = FileInput(files=(t1, t2, t3, t4), inplace=1, bufsize=bs)
[all …]
/external/libchrome/base/
Dtuple_unittest.cc42 std::tuple<int, int, int, int*> t4(1, 2, 3, &std::get<0>(t1)); in TEST() local
43 std::tuple<int, int, int, int, int*> t5(1, 2, 3, 4, &std::get<0>(t4)); in TEST()
44 std::tuple<int, int, int, int, int, int*> t6(1, 2, 3, 4, 5, &std::get<0>(t4)); in TEST()
47 DispatchToFunction(&DoAdd, t4); in TEST()
55 EXPECT_EQ(1, std::get<0>(t4)); in TEST()
57 EXPECT_EQ(10, std::get<0>(t4)); in TEST()
60 EXPECT_EQ(10, std::get<0>(t4)); in TEST()
62 EXPECT_EQ(15, std::get<0>(t4)); in TEST()
/external/llvm/test/MC/Mips/
Dmips64-register-names-n32-n64.s30 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
31 # WARNING-NEXT: daddiu $t4, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0c,0x00,0x00]
34 daddiu $t4, $zero, 0 # CHECK: encoding: [0x64,0x0c,0x00,0x00]
35 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
40 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
45 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
68 # [*] - t0-t3 are aliases of t4-t7 for compatibility with both the original
69 # ABI documentation (using t4-t7) and GNU As (using t0-t3)
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/engines/
DAESEngine.java321 int t4 = Pack.littleEndianToInt(key, 16); W[1][0] = t4; in generateWorkingKey() local
330 t4 ^= t3; W[2][2] = t4; in generateWorkingKey()
331 t5 ^= t4; W[2][3] = t5; in generateWorkingKey()
340 t4 ^= t3; W[i + 1][0] = t4; in generateWorkingKey()
341 t5 ^= t4; W[i + 1][1] = t5; in generateWorkingKey()
347 t4 ^= t3; W[i + 2][2] = t4; in generateWorkingKey()
348 t5 ^= t4; W[i + 2][3] = t5; in generateWorkingKey()
365 int t4 = Pack.littleEndianToInt(key, 16); W[1][0] = t4; in generateWorkingKey() local
380 t4 ^= u; W[i + 1][0] = t4; in generateWorkingKey()
381 t5 ^= t4; W[i + 1][1] = t5; in generateWorkingKey()

12345678910>>...24