47 static void iomd_get_next_sg(struct scatterlist *sg, dma_t *dma)  in iomd_get_next_sg()  argument
51 	if (dma->sg) {  in iomd_get_next_sg()
52 		sg->dma_address = dma->sg->dma_address;  in iomd_get_next_sg()
55 		end = offset + dma->sg->length;  in iomd_get_next_sg()
65 		dma->sg->length -= end - offset;  in iomd_get_next_sg()
66 		dma->sg->dma_address += end - offset;  in iomd_get_next_sg()
68 		if (dma->sg->length == 0) {  in iomd_get_next_sg()
69 			if (dma->sgcount > 1) {  in iomd_get_next_sg()
70 				dma->sg++;  in iomd_get_next_sg()
71 				dma->sgcount--;  in iomd_get_next_sg()
73 				dma->sg = NULL;  in iomd_get_next_sg()
88 	dma_t *dma = (dma_t *)dev_id;  in iomd_dma_handle()  local
89 	unsigned long base = dma->dma_base;  in iomd_dma_handle()
98 		if ((dma->state ^ status) & DMA_ST_AB)  in iomd_dma_handle()
99 			iomd_get_next_sg(&dma->cur_sg, dma);  in iomd_dma_handle()
104 			iomd_writel(dma->cur_sg.dma_address, base + CURA);  in iomd_dma_handle()
105 			iomd_writel(dma->cur_sg.length, base + ENDA);  in iomd_dma_handle()
106 			dma->state = DMA_ST_AB;  in iomd_dma_handle()
111 			iomd_writel(dma->cur_sg.dma_address, base + CURB);  in iomd_dma_handle()
112 			iomd_writel(dma->cur_sg.length, base + ENDB);  in iomd_dma_handle()
113 			dma->state = 0;  in iomd_dma_handle()
118 		    dma->cur_sg.length == (DMA_END_S|DMA_END_L))  in iomd_dma_handle()
122 	dma->state = ~DMA_ST_AB;  in iomd_dma_handle()
128 static int iomd_request_dma(dmach_t channel, dma_t *dma)  in iomd_request_dma()  argument
130 	return request_irq(dma->dma_irq, iomd_dma_handle,  in iomd_request_dma()
131 			   IRQF_DISABLED, dma->device_id, dma);  in iomd_request_dma()
134 static void iomd_free_dma(dmach_t channel, dma_t *dma)  in iomd_free_dma()  argument
136 	free_irq(dma->dma_irq, dma);  in iomd_free_dma()
139 static void iomd_enable_dma(dmach_t channel, dma_t *dma)  in iomd_enable_dma()  argument
141 	unsigned long dma_base = dma->dma_base;  in iomd_enable_dma()
144 	if (dma->invalid) {  in iomd_enable_dma()
145 		dma->invalid = 0;  in iomd_enable_dma()
151 		if (!dma->sg) {  in iomd_enable_dma()
152 			dma->sg = &dma->buf;  in iomd_enable_dma()
153 			dma->sgcount = 1;  in iomd_enable_dma()
154 			dma->buf.length = dma->count;  in iomd_enable_dma()
155 			dma->buf.dma_address = dma_map_single(NULL,  in iomd_enable_dma()
156 				dma->addr, dma->count,  in iomd_enable_dma()
157 				dma->dma_mode == DMA_MODE_READ ?  in iomd_enable_dma()
162 		dma->state = DMA_ST_AB;  in iomd_enable_dma()
165 	if (dma->dma_mode == DMA_MODE_READ)  in iomd_enable_dma()
169 	enable_irq(dma->dma_irq);  in iomd_enable_dma()
172 static void iomd_disable_dma(dmach_t channel, dma_t *dma)  in iomd_disable_dma()  argument
174 	unsigned long dma_base = dma->dma_base;  in iomd_disable_dma()
178 	if (dma->state != ~DMA_ST_AB)  in iomd_disable_dma()
179 		disable_irq(dma->dma_irq);  in iomd_disable_dma()
184 static int iomd_set_dma_speed(dmach_t channel, dma_t *dma, int cycle)  in iomd_set_dma_speed()  argument
239 static void floppy_enable_dma(dmach_t channel, dma_t *dma)  in floppy_enable_dma()  argument
245 	if (dma->sg)  in floppy_enable_dma()
248 	if (dma->dma_mode == DMA_MODE_READ) {  in floppy_enable_dma()
258 	regs.ARM_r9  = dma->count;  in floppy_enable_dma()
259 	regs.ARM_r10 = (unsigned long)dma->addr;  in floppy_enable_dma()
269 	enable_fiq(dma->dma_irq);  in floppy_enable_dma()
272 static void floppy_disable_dma(dmach_t channel, dma_t *dma)  in floppy_disable_dma()  argument
274 	disable_fiq(dma->dma_irq);  in floppy_disable_dma()
278 static int floppy_get_residue(dmach_t channel, dma_t *dma)  in floppy_get_residue()  argument
295 static void sound_enable_disable_dma(dmach_t channel, dma_t *dma)  in sound_enable_disable_dma()  argument
305 void __init arch_dma_init(dma_t *dma)  in arch_dma_init()  argument
314 	dma[DMA_0].dma_base		= IOMD_IO0CURA;  in arch_dma_init()
315 	dma[DMA_0].dma_irq		= IRQ_DMA0;  in arch_dma_init()
316 	dma[DMA_0].d_ops		= &iomd_dma_ops;  in arch_dma_init()
317 	dma[DMA_1].dma_base		= IOMD_IO1CURA;  in arch_dma_init()
318 	dma[DMA_1].dma_irq		= IRQ_DMA1;  in arch_dma_init()
319 	dma[DMA_1].d_ops		= &iomd_dma_ops;  in arch_dma_init()
320 	dma[DMA_2].dma_base		= IOMD_IO2CURA;  in arch_dma_init()
321 	dma[DMA_2].dma_irq		= IRQ_DMA2;  in arch_dma_init()
322 	dma[DMA_2].d_ops		= &iomd_dma_ops;  in arch_dma_init()
323 	dma[DMA_3].dma_base		= IOMD_IO3CURA;  in arch_dma_init()
324 	dma[DMA_3].dma_irq		= IRQ_DMA3;  in arch_dma_init()
325 	dma[DMA_3].d_ops		= &iomd_dma_ops;  in arch_dma_init()
326 	dma[DMA_S0].dma_base		= IOMD_SD0CURA;  in arch_dma_init()
327 	dma[DMA_S0].dma_irq		= IRQ_DMAS0;  in arch_dma_init()
328 	dma[DMA_S0].d_ops		= &iomd_dma_ops;  in arch_dma_init()
329 	dma[DMA_S1].dma_base		= IOMD_SD1CURA;  in arch_dma_init()
330 	dma[DMA_S1].dma_irq		= IRQ_DMAS1;  in arch_dma_init()
331 	dma[DMA_S1].d_ops		= &iomd_dma_ops;  in arch_dma_init()
332 	dma[DMA_VIRTUAL_FLOPPY].dma_irq	= FIQ_FLOPPYDATA;  in arch_dma_init()
333 	dma[DMA_VIRTUAL_FLOPPY].d_ops	= &floppy_dma_ops;  in arch_dma_init()
334 	dma[DMA_VIRTUAL_SOUND].d_ops	= &sound_dma_ops;  in arch_dma_init()