Lines Matching refs:DMA_CCR
56 #define DMA_CCR(x) (0x8c + ((x) << 6)) /* Control Registers */ macro
223 DMA_BASE + DMA_CCR(channel)); in imx_dma_setup_single()
233 DMA_BASE + DMA_CCR(channel)); in imx_dma_setup_single()
320 DMA_BASE + DMA_CCR(channel)); in imx_dma_setup_sg()
328 DMA_BASE + DMA_CCR(channel)); in imx_dma_setup_sg()
467 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) | CCR_CEN | in imx_dma_enable()
469 DMA_BASE + DMA_CCR(channel)); in imx_dma_enable()
477 tmp = __raw_readl(DMA_BASE + DMA_CCR(channel)); in imx_dma_enable()
479 DMA_BASE + DMA_CCR(channel)); in imx_dma_enable()
506 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN, in imx_dma_disable()
507 DMA_BASE + DMA_CCR(channel)); in imx_dma_disable()
519 __raw_writel(0, DMA_BASE + DMA_CCR(chno)); in imx_dma_watchdog()
609 tmp = __raw_readl(DMA_BASE + DMA_CCR(chno)); in dma_irq_handle_channel()
620 DMA_CCR(chno)); in dma_irq_handle_channel()
623 DMA_CCR(chno)); in dma_irq_handle_channel()
627 __raw_writel(tmp, DMA_BASE + DMA_CCR(chno)); in dma_irq_handle_channel()
642 __raw_writel(0, DMA_BASE + DMA_CCR(chno)); in dma_irq_handle_channel()
742 __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN, in imx_dma_free()
743 DMA_BASE + DMA_CCR(channel)); in imx_dma_free()