Lines Matching refs:bfin_write32
53 #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val)
63 #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT, val)
65 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
67 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val)
70 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
72 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
74 #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
76 #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
79 #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
81 #define bfin_write_SIC_ISR(x, val) bfin_write32((SIC_ISR0 + (x << 6)), val)
84 #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
86 #define bfin_write_SIC_IWR(x, val) bfin_write32((SIC_IWR0 + (x << 6)), val)
91 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
93 #define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
95 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
97 #define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
99 #define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
101 #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
103 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
109 #define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
111 #define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
116 #define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT, val)
124 #define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM, val)
179 #define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
181 #define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
183 #define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
188 #define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
190 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
192 #define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
197 #define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
199 #define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
201 #define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
206 #define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
208 #define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
210 #define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
215 #define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
217 #define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
219 #define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
224 #define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
226 #define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
228 #define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
233 #define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
235 #define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD, val)
237 #define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH, val)
242 #define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER, val)
244 #define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD, val)
246 #define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH, val)
253 #define bfin_write_TIMER_STATUS(val) bfin_write32(TIMER_STATUS, val)
303 #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
305 #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
307 #define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX32, val)
309 #define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX32, val)
331 #define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val)
333 #define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val)
335 #define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val)
337 #define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val)
339 #define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val)
341 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
343 #define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val)
345 #define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val)
358 #define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val)
360 #define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val)
362 #define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX32, val)
364 #define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX32, val)
386 #define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0, val)
388 #define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1, val)
390 #define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2, val)
392 #define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3, val)
394 #define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0, val)
396 #define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1, val)
398 #define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2, val)
400 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
407 #define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val)
409 #define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val)
411 #define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL, val)
436 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
438 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR, val)
448 #define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_write32(DMA0_CURR_DESC_PTR, val)
450 #define bfin_write_DMA0_CURR_ADDR(val) bfin_write32(DMA0_CURR_ADDR, val)
463 #define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_write32(DMA1_NEXT_DESC_PTR, val)
465 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR, val)
475 #define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_write32(DMA1_CURR_DESC_PTR, val)
477 #define bfin_write_DMA1_CURR_ADDR(val) bfin_write32(DMA1_CURR_ADDR, val)
490 #define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_write32(DMA2_NEXT_DESC_PTR, val)
492 #define bfin_write_DMA2_START_ADDR(val) bfin_write32(DMA2_START_ADDR, val)
502 #define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_write32(DMA2_CURR_DESC_PTR, val)
504 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR, val)
517 #define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_write32(DMA3_NEXT_DESC_PTR, val)
519 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR, val)
529 #define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_write32(DMA3_CURR_DESC_PTR, val)
531 #define bfin_write_DMA3_CURR_ADDR(val) bfin_write32(DMA3_CURR_ADDR, val)
544 #define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_write32(DMA4_NEXT_DESC_PTR, val)
546 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
556 #define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_write32(DMA4_CURR_DESC_PTR, val)
558 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR, val)
571 #define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_write32(DMA5_NEXT_DESC_PTR, val)
573 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
583 #define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_write32(DMA5_CURR_DESC_PTR, val)
585 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR, val)
598 #define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_write32(DMA6_NEXT_DESC_PTR, val)
600 #define bfin_write_DMA6_START_ADDR(val) bfin_write32(DMA6_START_ADDR, val)
610 #define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_write32(DMA6_CURR_DESC_PTR, val)
612 #define bfin_write_DMA6_CURR_ADDR(val) bfin_write32(DMA6_CURR_ADDR, val)
625 #define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_write32(DMA7_NEXT_DESC_PTR, val)
627 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR, val)
637 #define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_write32(DMA7_CURR_DESC_PTR, val)
639 #define bfin_write_DMA7_CURR_ADDR(val) bfin_write32(DMA7_CURR_ADDR, val)
652 #define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_write32(DMA8_NEXT_DESC_PTR, val)
654 #define bfin_write_DMA8_START_ADDR(val) bfin_write32(DMA8_START_ADDR, val)
664 #define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_write32(DMA8_CURR_DESC_PTR, val)
666 #define bfin_write_DMA8_CURR_ADDR(val) bfin_write32(DMA8_CURR_ADDR, val)
679 #define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_write32(DMA9_NEXT_DESC_PTR, val)
681 #define bfin_write_DMA9_START_ADDR(val) bfin_write32(DMA9_START_ADDR, val)
691 #define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_write32(DMA9_CURR_DESC_PTR, val)
693 #define bfin_write_DMA9_CURR_ADDR(val) bfin_write32(DMA9_CURR_ADDR, val)
706 #define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_write32(DMA10_NEXT_DESC_PTR, val)
708 #define bfin_write_DMA10_START_ADDR(val) bfin_write32(DMA10_START_ADDR, val)
718 #define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_write32(DMA10_CURR_DESC_PTR, val)
720 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR, val)
733 #define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_write32(DMA11_NEXT_DESC_PTR, val)
735 #define bfin_write_DMA11_START_ADDR(val) bfin_write32(DMA11_START_ADDR, val)
745 #define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_write32(DMA11_CURR_DESC_PTR, val)
747 #define bfin_write_DMA11_CURR_ADDR(val) bfin_write32(DMA11_CURR_ADDR, val)
760 #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)
762 #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR, val)
772 #define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR, val)
774 #define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR, val)
787 #define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR, val)
789 #define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR, val)
799 #define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR, val)
801 #define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR, val)
814 #define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR, val)
816 #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR, val)
826 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR, val)
828 #define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR, val)
841 #define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR, val)
843 #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR, val)
853 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR, val)
855 #define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR, val)
1083 #define bfin_write_CNT_COUNTER(val) bfin_write32(CNT_COUNTER, val)
1085 #define bfin_write_CNT_MAX(val) bfin_write32(CNT_MAX, val)
1087 #define bfin_write_CNT_MIN(val) bfin_write32(CNT_MIN, val)
1098 #define bfin_write_OTP_TIMING(val) bfin_write32(OTP_TIMING, val)
1103 #define bfin_write_SECURE_SYSSWT(val) bfin_write32(SECURE_SYSSWT, val)
1112 #define bfin_write_OTP_DATA0(val) bfin_write32(OTP_DATA0, val)
1114 #define bfin_write_OTP_DATA1(val) bfin_write32(OTP_DATA1, val)
1116 #define bfin_write_OTP_DATA2(val) bfin_write32(OTP_DATA2, val)
1118 #define bfin_write_OTP_DATA3(val) bfin_write32(OTP_DATA3, val)
1171 bfin_write32(SIC_IWR0, IWR_ENABLE(0)); in bfin_write_PLL_CTL()
1172 bfin_write32(SIC_IWR1, 0); in bfin_write_PLL_CTL()
1178 bfin_write32(SIC_IWR0, iwr0); in bfin_write_PLL_CTL()
1179 bfin_write32(SIC_IWR1, iwr1); in bfin_write_PLL_CTL()
1196 bfin_write32(SIC_IWR0, IWR_ENABLE(0)); in bfin_write_VR_CTL()
1197 bfin_write32(SIC_IWR1, 0); in bfin_write_VR_CTL()
1203 bfin_write32(SIC_IWR0, iwr0); in bfin_write_VR_CTL()
1204 bfin_write32(SIC_IWR1, iwr1); in bfin_write_VR_CTL()