Lines Matching refs:bfin_write32
56 #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val)
68 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
70 #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
72 #define bfin_write_SIC_IMASK2(val) bfin_write32(SIC_IMASK2, val)
74 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 2)), val)
77 #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
79 #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
81 #define bfin_write_SIC_ISR2(val) bfin_write32(SIC_ISR2, val)
83 #define bfin_write_SIC_ISR(x, val) bfin_write32((SIC_ISR0 + (x << 2)), val)
86 #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
88 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
90 #define bfin_write_SIC_IWR2(val) bfin_write32(SIC_IWR2, val)
92 #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
94 #define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
96 #define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
98 #define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
100 #define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
102 #define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
104 #define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
106 #define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
108 #define bfin_write_SIC_IAR8(val) bfin_write32(SIC_IAR8, val)
110 #define bfin_write_SIC_IAR9(val) bfin_write32(SIC_IAR9, val)
112 #define bfin_write_SIC_IAR10(val) bfin_write32(SIC_IAR10, val)
114 #define bfin_write_SIC_IAR11(val) bfin_write32(SIC_IAR11, val)
121 #define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
123 #define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
128 #define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT, val)
136 #define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM, val)
201 #define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val)
203 #define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val)
221 #define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0, val)
223 #define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1, val)
225 #define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2, val)
227 #define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3, val)
229 #define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0, val)
231 #define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1, val)
233 #define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2, val)
235 #define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
242 #define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val)
244 #define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val)
248 #define bfin_write_EBIU_ARBSTAT(val) bfin_write32(EBIU_ARBSTAT, val)
250 #define bfin_write_EBIU_MODE(val) bfin_write32(EBIU_MODE, val)
257 #define bfin_write_EBIU_DDRCTL0(val) bfin_write32(EBIU_DDRCTL0, val)
259 #define bfin_write_EBIU_DDRCTL1(val) bfin_write32(EBIU_DDRCTL1, val)
261 #define bfin_write_EBIU_DDRCTL2(val) bfin_write32(EBIU_DDRCTL2, val)
263 #define bfin_write_EBIU_DDRCTL3(val) bfin_write32(EBIU_DDRCTL3, val)
265 #define bfin_write_EBIU_DDRQUE(val) bfin_write32(EBIU_DDRQUE, val)
267 #define bfin_write_EBIU_ERRADD(val) bfin_write32(EBIU_ERRADD, val)
276 #define bfin_write_EBIU_DDRBRC0(val) bfin_write32(EBIU_DDRBRC0, val)
278 #define bfin_write_EBIU_DDRBRC1(val) bfin_write32(EBIU_DDRBRC1, val)
280 #define bfin_write_EBIU_DDRBRC2(val) bfin_write32(EBIU_DDRBRC2, val)
282 #define bfin_write_EBIU_DDRBRC3(val) bfin_write32(EBIU_DDRBRC3, val)
284 #define bfin_write_EBIU_DDRBRC4(val) bfin_write32(EBIU_DDRBRC4, val)
286 #define bfin_write_EBIU_DDRBRC5(val) bfin_write32(EBIU_DDRBRC5, val)
288 #define bfin_write_EBIU_DDRBRC6(val) bfin_write32(EBIU_DDRBRC6, val)
290 #define bfin_write_EBIU_DDRBRC7(val) bfin_write32(EBIU_DDRBRC7, val)
292 #define bfin_write_EBIU_DDRBWC0(val) bfin_write32(EBIU_DDRBWC0, val)
294 #define bfin_write_EBIU_DDRBWC1(val) bfin_write32(EBIU_DDRBWC1, val)
296 #define bfin_write_EBIU_DDRBWC2(val) bfin_write32(EBIU_DDRBWC2, val)
298 #define bfin_write_EBIU_DDRBWC3(val) bfin_write32(EBIU_DDRBWC3, val)
300 #define bfin_write_EBIU_DDRBWC4(val) bfin_write32(EBIU_DDRBWC4, val)
302 #define bfin_write_EBIU_DDRBWC5(val) bfin_write32(EBIU_DDRBWC5, val)
304 #define bfin_write_EBIU_DDRBWC6(val) bfin_write32(EBIU_DDRBWC6, val)
306 #define bfin_write_EBIU_DDRBWC7(val) bfin_write32(EBIU_DDRBWC7, val)
308 #define bfin_write_EBIU_DDRACCT(val) bfin_write32(EBIU_DDRACCT, val)
310 #define bfin_write_EBIU_DDRTACT(val) bfin_write32(EBIU_DDRTACT, val)
312 #define bfin_write_EBIU_DDRARCT(val) bfin_write32(EBIU_DDRARCT, val)
314 #define bfin_write_EBIU_DDRGC0(val) bfin_write32(EBIU_DDRGC0, val)
316 #define bfin_write_EBIU_DDRGC1(val) bfin_write32(EBIU_DDRGC1, val)
318 #define bfin_write_EBIU_DDRGC2(val) bfin_write32(EBIU_DDRGC2, val)
320 #define bfin_write_EBIU_DDRGC3(val) bfin_write32(EBIU_DDRGC3, val)
322 #define bfin_write_EBIU_DDRMCEN(val) bfin_write32(EBIU_DDRMCEN, val)
324 #define bfin_write_EBIU_DDRMCCL(val) bfin_write32(EBIU_DDRMCCL, val)
336 #define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_write32(DMA0_NEXT_DESC_PTR, val)
338 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR, val)
350 #define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_write32(DMA0_CURR_DESC_PTR, val)
352 #define bfin_write_DMA0_CURR_ADDR(val) bfin_write32(DMA0_CURR_ADDR, val)
365 #define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_write32(DMA1_NEXT_DESC_PTR, val)
367 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR, val)
379 #define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_write32(DMA1_CURR_DESC_PTR, val)
381 #define bfin_write_DMA1_CURR_ADDR(val) bfin_write32(DMA1_CURR_ADDR, val)
394 #define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_write32(DMA2_NEXT_DESC_PTR, val)
396 #define bfin_write_DMA2_START_ADDR(val) bfin_write32(DMA2_START_ADDR, val)
408 #define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_write32(DMA2_CURR_DESC_PTR, val)
410 #define bfin_write_DMA2_CURR_ADDR(val) bfin_write32(DMA2_CURR_ADDR, val)
423 #define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_write32(DMA3_NEXT_DESC_PTR, val)
425 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR, val)
437 #define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_write32(DMA3_CURR_DESC_PTR, val)
439 #define bfin_write_DMA3_CURR_ADDR(val) bfin_write32(DMA3_CURR_ADDR, val)
452 #define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_write32(DMA4_NEXT_DESC_PTR, val)
454 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
466 #define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_write32(DMA4_CURR_DESC_PTR, val)
468 #define bfin_write_DMA4_CURR_ADDR(val) bfin_write32(DMA4_CURR_ADDR, val)
481 #define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_write32(DMA5_NEXT_DESC_PTR, val)
483 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
495 #define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_write32(DMA5_CURR_DESC_PTR, val)
497 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR, val)
510 #define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_write32(DMA6_NEXT_DESC_PTR, val)
512 #define bfin_write_DMA6_START_ADDR(val) bfin_write32(DMA6_START_ADDR, val)
524 #define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_write32(DMA6_CURR_DESC_PTR, val)
526 #define bfin_write_DMA6_CURR_ADDR(val) bfin_write32(DMA6_CURR_ADDR, val)
539 #define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_write32(DMA7_NEXT_DESC_PTR, val)
541 #define bfin_write_DMA7_START_ADDR(val) bfin_write32(DMA7_START_ADDR, val)
553 #define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_write32(DMA7_CURR_DESC_PTR, val)
555 #define bfin_write_DMA7_CURR_ADDR(val) bfin_write32(DMA7_CURR_ADDR, val)
568 #define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_write32(DMA8_NEXT_DESC_PTR, val)
570 #define bfin_write_DMA8_START_ADDR(val) bfin_write32(DMA8_START_ADDR, val)
582 #define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_write32(DMA8_CURR_DESC_PTR, val)
584 #define bfin_write_DMA8_CURR_ADDR(val) bfin_write32(DMA8_CURR_ADDR, val)
597 #define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_write32(DMA9_NEXT_DESC_PTR, val)
599 #define bfin_write_DMA9_START_ADDR(val) bfin_write32(DMA9_START_ADDR, val)
611 #define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_write32(DMA9_CURR_DESC_PTR, val)
613 #define bfin_write_DMA9_CURR_ADDR(val) bfin_write32(DMA9_CURR_ADDR, val)
626 #define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_write32(DMA10_NEXT_DESC_PTR, val)
628 #define bfin_write_DMA10_START_ADDR(val) bfin_write32(DMA10_START_ADDR, val)
640 #define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_write32(DMA10_CURR_DESC_PTR, val)
642 #define bfin_write_DMA10_CURR_ADDR(val) bfin_write32(DMA10_CURR_ADDR, val)
655 #define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_write32(DMA11_NEXT_DESC_PTR, val)
657 #define bfin_write_DMA11_START_ADDR(val) bfin_write32(DMA11_START_ADDR, val)
669 #define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_write32(DMA11_CURR_DESC_PTR, val)
671 #define bfin_write_DMA11_CURR_ADDR(val) bfin_write32(DMA11_CURR_ADDR, val)
684 #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)
686 #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR, val)
698 #define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR, val)
700 #define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR, val)
710 #define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR, val)
712 #define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR, val)
724 #define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR, val)
726 #define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR, val)
739 #define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR, val)
741 #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR, val)
753 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR, val)
755 #define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR, val)
765 #define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR, val)
767 #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR, val)
779 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR, val)
781 #define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR, val)
810 #define bfin_write_EPPI1_CONTROL(val) bfin_write32(EPPI1_CONTROL, val)
812 #define bfin_write_EPPI1_FS1W_HBL(val) bfin_write32(EPPI1_FS1W_HBL, val)
814 #define bfin_write_EPPI1_FS1P_AVPL(val) bfin_write32(EPPI1_FS1P_AVPL, val)
816 #define bfin_write_EPPI1_FS2W_LVB(val) bfin_write32(EPPI1_FS2W_LVB, val)
818 #define bfin_write_EPPI1_FS2P_LAVF(val) bfin_write32(EPPI1_FS2P_LAVF, val)
820 #define bfin_write_EPPI1_CLIP(val) bfin_write32(EPPI1_CLIP, val)
825 #define bfin_write_PINT0_MASK_SET(val) bfin_write32(PINT0_MASK_SET, val)
827 #define bfin_write_PINT0_MASK_CLEAR(val) bfin_write32(PINT0_MASK_CLEAR, val)
829 #define bfin_write_PINT0_REQUEST(val) bfin_write32(PINT0_REQUEST, val)
831 #define bfin_write_PINT0_ASSIGN(val) bfin_write32(PINT0_ASSIGN, val)
833 #define bfin_write_PINT0_EDGE_SET(val) bfin_write32(PINT0_EDGE_SET, val)
835 #define bfin_write_PINT0_EDGE_CLEAR(val) bfin_write32(PINT0_EDGE_CLEAR, val)
837 #define bfin_write_PINT0_INVERT_SET(val) bfin_write32(PINT0_INVERT_SET, val)
839 #define bfin_write_PINT0_INVERT_CLEAR(val) bfin_write32(PINT0_INVERT_CLEAR, val)
841 #define bfin_write_PINT0_PINSTATE(val) bfin_write32(PINT0_PINSTATE, val)
843 #define bfin_write_PINT0_LATCH(val) bfin_write32(PINT0_LATCH, val)
848 #define bfin_write_PINT1_MASK_SET(val) bfin_write32(PINT1_MASK_SET, val)
850 #define bfin_write_PINT1_MASK_CLEAR(val) bfin_write32(PINT1_MASK_CLEAR, val)
852 #define bfin_write_PINT1_REQUEST(val) bfin_write32(PINT1_REQUEST, val)
854 #define bfin_write_PINT1_ASSIGN(val) bfin_write32(PINT1_ASSIGN, val)
856 #define bfin_write_PINT1_EDGE_SET(val) bfin_write32(PINT1_EDGE_SET, val)
858 #define bfin_write_PINT1_EDGE_CLEAR(val) bfin_write32(PINT1_EDGE_CLEAR, val)
860 #define bfin_write_PINT1_INVERT_SET(val) bfin_write32(PINT1_INVERT_SET, val)
862 #define bfin_write_PINT1_INVERT_CLEAR(val) bfin_write32(PINT1_INVERT_CLEAR, val)
864 #define bfin_write_PINT1_PINSTATE(val) bfin_write32(PINT1_PINSTATE, val)
866 #define bfin_write_PINT1_LATCH(val) bfin_write32(PINT1_LATCH, val)
871 #define bfin_write_PINT2_MASK_SET(val) bfin_write32(PINT2_MASK_SET, val)
873 #define bfin_write_PINT2_MASK_CLEAR(val) bfin_write32(PINT2_MASK_CLEAR, val)
875 #define bfin_write_PINT2_REQUEST(val) bfin_write32(PINT2_REQUEST, val)
877 #define bfin_write_PINT2_ASSIGN(val) bfin_write32(PINT2_ASSIGN, val)
879 #define bfin_write_PINT2_EDGE_SET(val) bfin_write32(PINT2_EDGE_SET, val)
881 #define bfin_write_PINT2_EDGE_CLEAR(val) bfin_write32(PINT2_EDGE_CLEAR, val)
883 #define bfin_write_PINT2_INVERT_SET(val) bfin_write32(PINT2_INVERT_SET, val)
885 #define bfin_write_PINT2_INVERT_CLEAR(val) bfin_write32(PINT2_INVERT_CLEAR, val)
887 #define bfin_write_PINT2_PINSTATE(val) bfin_write32(PINT2_PINSTATE, val)
889 #define bfin_write_PINT2_LATCH(val) bfin_write32(PINT2_LATCH, val)
894 #define bfin_write_PINT3_MASK_SET(val) bfin_write32(PINT3_MASK_SET, val)
896 #define bfin_write_PINT3_MASK_CLEAR(val) bfin_write32(PINT3_MASK_CLEAR, val)
898 #define bfin_write_PINT3_REQUEST(val) bfin_write32(PINT3_REQUEST, val)
900 #define bfin_write_PINT3_ASSIGN(val) bfin_write32(PINT3_ASSIGN, val)
902 #define bfin_write_PINT3_EDGE_SET(val) bfin_write32(PINT3_EDGE_SET, val)
904 #define bfin_write_PINT3_EDGE_CLEAR(val) bfin_write32(PINT3_EDGE_CLEAR, val)
906 #define bfin_write_PINT3_INVERT_SET(val) bfin_write32(PINT3_INVERT_SET, val)
908 #define bfin_write_PINT3_INVERT_CLEAR(val) bfin_write32(PINT3_INVERT_CLEAR, val)
910 #define bfin_write_PINT3_PINSTATE(val) bfin_write32(PINT3_PINSTATE, val)
912 #define bfin_write_PINT3_LATCH(val) bfin_write32(PINT3_LATCH, val)
931 #define bfin_write_PORTA_MUX(val) bfin_write32(PORTA_MUX, val)
950 #define bfin_write_PORTB_MUX(val) bfin_write32(PORTB_MUX, val)
969 #define bfin_write_PORTC_MUX(val) bfin_write32(PORTC_MUX, val)
988 #define bfin_write_PORTD_MUX(val) bfin_write32(PORTD_MUX, val)
1007 #define bfin_write_PORTE_MUX(val) bfin_write32(PORTE_MUX, val)
1026 #define bfin_write_PORTF_MUX(val) bfin_write32(PORTF_MUX, val)
1045 #define bfin_write_PORTG_MUX(val) bfin_write32(PORTG_MUX, val)
1064 #define bfin_write_PORTH_MUX(val) bfin_write32(PORTH_MUX, val)
1083 #define bfin_write_PORTI_MUX(val) bfin_write32(PORTI_MUX, val)
1102 #define bfin_write_PORTJ_MUX(val) bfin_write32(PORTJ_MUX, val)
1109 #define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
1111 #define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
1113 #define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
1117 #define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
1119 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
1121 #define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
1125 #define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
1127 #define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
1129 #define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
1133 #define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
1135 #define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
1137 #define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
1141 #define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
1143 #define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
1145 #define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
1149 #define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
1151 #define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
1153 #define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
1157 #define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
1159 #define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD, val)
1161 #define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH, val)
1165 #define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER, val)
1167 #define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD, val)
1169 #define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH, val)
1178 #define bfin_write_TIMER_STATUS0(val) bfin_write32(TIMER_STATUS0, val)
1190 #define bfin_write_DMA12_NEXT_DESC_PTR(val) bfin_write32(DMA12_NEXT_DESC_PTR, val)
1192 #define bfin_write_DMA12_START_ADDR(val) bfin_write32(DMA12_START_ADDR, val)
1204 #define bfin_write_DMA12_CURR_DESC_PTR(val) bfin_write32(DMA12_CURR_DESC_PTR, val)
1206 #define bfin_write_DMA12_CURR_ADDR(val) bfin_write32(DMA12_CURR_ADDR, val)
1219 #define bfin_write_DMA13_NEXT_DESC_PTR(val) bfin_write32(DMA13_NEXT_DESC_PTR, val)
1221 #define bfin_write_DMA13_START_ADDR(val) bfin_write32(DMA13_START_ADDR, val)
1233 #define bfin_write_DMA13_CURR_DESC_PTR(val) bfin_write32(DMA13_CURR_DESC_PTR, val)
1235 #define bfin_write_DMA13_CURR_ADDR(val) bfin_write32(DMA13_CURR_ADDR, val)
1248 #define bfin_write_DMA14_NEXT_DESC_PTR(val) bfin_write32(DMA14_NEXT_DESC_PTR, val)
1250 #define bfin_write_DMA14_START_ADDR(val) bfin_write32(DMA14_START_ADDR, val)
1262 #define bfin_write_DMA14_CURR_DESC_PTR(val) bfin_write32(DMA14_CURR_DESC_PTR, val)
1264 #define bfin_write_DMA14_CURR_ADDR(val) bfin_write32(DMA14_CURR_ADDR, val)
1277 #define bfin_write_DMA15_NEXT_DESC_PTR(val) bfin_write32(DMA15_NEXT_DESC_PTR, val)
1279 #define bfin_write_DMA15_START_ADDR(val) bfin_write32(DMA15_START_ADDR, val)
1291 #define bfin_write_DMA15_CURR_DESC_PTR(val) bfin_write32(DMA15_CURR_DESC_PTR, val)
1293 #define bfin_write_DMA15_CURR_ADDR(val) bfin_write32(DMA15_CURR_ADDR, val)
1306 #define bfin_write_DMA16_NEXT_DESC_PTR(val) bfin_write32(DMA16_NEXT_DESC_PTR, val)
1308 #define bfin_write_DMA16_START_ADDR(val) bfin_write32(DMA16_START_ADDR, val)
1320 #define bfin_write_DMA16_CURR_DESC_PTR(val) bfin_write32(DMA16_CURR_DESC_PTR, val)
1322 #define bfin_write_DMA16_CURR_ADDR(val) bfin_write32(DMA16_CURR_ADDR, val)
1335 #define bfin_write_DMA17_NEXT_DESC_PTR(val) bfin_write32(DMA17_NEXT_DESC_PTR, val)
1337 #define bfin_write_DMA17_START_ADDR(val) bfin_write32(DMA17_START_ADDR, val)
1349 #define bfin_write_DMA17_CURR_DESC_PTR(val) bfin_write32(DMA17_CURR_DESC_PTR, val)
1351 #define bfin_write_DMA17_CURR_ADDR(val) bfin_write32(DMA17_CURR_ADDR, val)
1364 #define bfin_write_DMA18_NEXT_DESC_PTR(val) bfin_write32(DMA18_NEXT_DESC_PTR, val)
1366 #define bfin_write_DMA18_START_ADDR(val) bfin_write32(DMA18_START_ADDR, val)
1378 #define bfin_write_DMA18_CURR_DESC_PTR(val) bfin_write32(DMA18_CURR_DESC_PTR, val)
1380 #define bfin_write_DMA18_CURR_ADDR(val) bfin_write32(DMA18_CURR_ADDR, val)
1393 #define bfin_write_DMA19_NEXT_DESC_PTR(val) bfin_write32(DMA19_NEXT_DESC_PTR, val)
1395 #define bfin_write_DMA19_START_ADDR(val) bfin_write32(DMA19_START_ADDR, val)
1407 #define bfin_write_DMA19_CURR_DESC_PTR(val) bfin_write32(DMA19_CURR_DESC_PTR, val)
1409 #define bfin_write_DMA19_CURR_ADDR(val) bfin_write32(DMA19_CURR_ADDR, val)
1422 #define bfin_write_DMA20_NEXT_DESC_PTR(val) bfin_write32(DMA20_NEXT_DESC_PTR, val)
1424 #define bfin_write_DMA20_START_ADDR(val) bfin_write32(DMA20_START_ADDR, val)
1436 #define bfin_write_DMA20_CURR_DESC_PTR(val) bfin_write32(DMA20_CURR_DESC_PTR, val)
1438 #define bfin_write_DMA20_CURR_ADDR(val) bfin_write32(DMA20_CURR_ADDR, val)
1451 #define bfin_write_DMA21_NEXT_DESC_PTR(val) bfin_write32(DMA21_NEXT_DESC_PTR, val)
1453 #define bfin_write_DMA21_START_ADDR(val) bfin_write32(DMA21_START_ADDR, val)
1465 #define bfin_write_DMA21_CURR_DESC_PTR(val) bfin_write32(DMA21_CURR_DESC_PTR, val)
1467 #define bfin_write_DMA21_CURR_ADDR(val) bfin_write32(DMA21_CURR_ADDR, val)
1480 #define bfin_write_DMA22_NEXT_DESC_PTR(val) bfin_write32(DMA22_NEXT_DESC_PTR, val)
1482 #define bfin_write_DMA22_START_ADDR(val) bfin_write32(DMA22_START_ADDR, val)
1494 #define bfin_write_DMA22_CURR_DESC_PTR(val) bfin_write32(DMA22_CURR_DESC_PTR, val)
1496 #define bfin_write_DMA22_CURR_ADDR(val) bfin_write32(DMA22_CURR_ADDR, val)
1509 #define bfin_write_DMA23_NEXT_DESC_PTR(val) bfin_write32(DMA23_NEXT_DESC_PTR, val)
1511 #define bfin_write_DMA23_START_ADDR(val) bfin_write32(DMA23_START_ADDR, val)
1523 #define bfin_write_DMA23_CURR_DESC_PTR(val) bfin_write32(DMA23_CURR_DESC_PTR, val)
1525 #define bfin_write_DMA23_CURR_ADDR(val) bfin_write32(DMA23_CURR_ADDR, val)
1538 #define bfin_write_MDMA_D2_NEXT_DESC_PTR(val) bfin_write32(MDMA_D2_NEXT_DESC_PTR, val)
1540 #define bfin_write_MDMA_D2_START_ADDR(val) bfin_write32(MDMA_D2_START_ADDR, val)
1552 #define bfin_write_MDMA_D2_CURR_DESC_PTR(val) bfin_write32(MDMA_D2_CURR_DESC_PTR, val)
1554 #define bfin_write_MDMA_D2_CURR_ADDR(val) bfin_write32(MDMA_D2_CURR_ADDR, val)
1564 #define bfin_write_MDMA_S2_NEXT_DESC_PTR(val) bfin_write32(MDMA_S2_NEXT_DESC_PTR, val)
1566 #define bfin_write_MDMA_S2_START_ADDR(val) bfin_write32(MDMA_S2_START_ADDR, val)
1578 #define bfin_write_MDMA_S2_CURR_DESC_PTR(val) bfin_write32(MDMA_S2_CURR_DESC_PTR, val)
1580 #define bfin_write_MDMA_S2_CURR_ADDR(val) bfin_write32(MDMA_S2_CURR_ADDR, val)
1593 #define bfin_write_MDMA_D3_NEXT_DESC_PTR(val) bfin_write32(MDMA_D3_NEXT_DESC_PTR, val)
1595 #define bfin_write_MDMA_D3_START_ADDR(val) bfin_write32(MDMA_D3_START_ADDR, val)
1607 #define bfin_write_MDMA_D3_CURR_DESC_PTR(val) bfin_write32(MDMA_D3_CURR_DESC_PTR, val)
1609 #define bfin_write_MDMA_D3_CURR_ADDR(val) bfin_write32(MDMA_D3_CURR_ADDR, val)
1619 #define bfin_write_MDMA_S3_NEXT_DESC_PTR(val) bfin_write32(MDMA_S3_NEXT_DESC_PTR, val)
1621 #define bfin_write_MDMA_S3_START_ADDR(val) bfin_write32(MDMA_S3_START_ADDR, val)
1633 #define bfin_write_MDMA_S3_CURR_DESC_PTR(val) bfin_write32(MDMA_S3_CURR_DESC_PTR, val)
1635 #define bfin_write_MDMA_S3_CURR_ADDR(val) bfin_write32(MDMA_S3_CURR_ADDR, val)
1702 #define bfin_write_SPORT2_TX(val) bfin_write32(SPORT2_TX, val)
1704 #define bfin_write_SPORT2_RX(val) bfin_write32(SPORT2_RX, val)
1722 #define bfin_write_SPORT2_MTCS0(val) bfin_write32(SPORT2_MTCS0, val)
1724 #define bfin_write_SPORT2_MTCS1(val) bfin_write32(SPORT2_MTCS1, val)
1726 #define bfin_write_SPORT2_MTCS2(val) bfin_write32(SPORT2_MTCS2, val)
1728 #define bfin_write_SPORT2_MTCS3(val) bfin_write32(SPORT2_MTCS3, val)
1730 #define bfin_write_SPORT2_MRCS0(val) bfin_write32(SPORT2_MRCS0, val)
1732 #define bfin_write_SPORT2_MRCS1(val) bfin_write32(SPORT2_MRCS1, val)
1734 #define bfin_write_SPORT2_MRCS2(val) bfin_write32(SPORT2_MRCS2, val)
1736 #define bfin_write_SPORT2_MRCS3(val) bfin_write32(SPORT2_MRCS3, val)
1749 #define bfin_write_SPORT3_TX(val) bfin_write32(SPORT3_TX, val)
1751 #define bfin_write_SPORT3_RX(val) bfin_write32(SPORT3_RX, val)
1769 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
1771 #define bfin_write_SPORT3_MTCS1(val) bfin_write32(SPORT3_MTCS1, val)
1773 #define bfin_write_SPORT3_MTCS2(val) bfin_write32(SPORT3_MTCS2, val)
1775 #define bfin_write_SPORT3_MTCS3(val) bfin_write32(SPORT3_MTCS3, val)
1777 #define bfin_write_SPORT3_MRCS0(val) bfin_write32(SPORT3_MRCS0, val)
1779 #define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)
1781 #define bfin_write_SPORT3_MRCS2(val) bfin_write32(SPORT3_MRCS2, val)
1783 #define bfin_write_SPORT3_MRCS3(val) bfin_write32(SPORT3_MRCS3, val)
1804 #define bfin_write_EPPI2_CONTROL(val) bfin_write32(EPPI2_CONTROL, val)
1806 #define bfin_write_EPPI2_FS1W_HBL(val) bfin_write32(EPPI2_FS1W_HBL, val)
1808 #define bfin_write_EPPI2_FS1P_AVPL(val) bfin_write32(EPPI2_FS1P_AVPL, val)
1810 #define bfin_write_EPPI2_FS2W_LVB(val) bfin_write32(EPPI2_FS2W_LVB, val)
1812 #define bfin_write_EPPI2_FS2P_LAVF(val) bfin_write32(EPPI2_FS2P_LAVF, val)
1814 #define bfin_write_EPPI2_CLIP(val) bfin_write32(EPPI2_CLIP, val)
2636 #define bfin_write_CNT_COUNTER(val) bfin_write32(CNT_COUNTER, val)
2638 #define bfin_write_CNT_MAX(val) bfin_write32(CNT_MAX, val)
2640 #define bfin_write_CNT_MIN(val) bfin_write32(CNT_MIN, val)
2651 #define bfin_write_OTP_TIMING(val) bfin_write32(OTP_TIMING, val)
2656 #define bfin_write_SECURE_SYSSWT(val) bfin_write32(SECURE_SYSSWT, val)
2670 #define bfin_write_OTP_DATA0(val) bfin_write32(OTP_DATA0, val)
2672 #define bfin_write_OTP_DATA1(val) bfin_write32(OTP_DATA1, val)
2674 #define bfin_write_OTP_DATA2(val) bfin_write32(OTP_DATA2, val)
2676 #define bfin_write_OTP_DATA3(val) bfin_write32(OTP_DATA3, val)
2711 bfin_write32(SIC_IWR0, IWR_ENABLE(0)); in bfin_write_PLL_CTL()
2712 bfin_write32(SIC_IWR1, 0); in bfin_write_PLL_CTL()
2713 bfin_write32(SIC_IWR2, 0); in bfin_write_PLL_CTL()
2719 bfin_write32(SIC_IWR0, iwr0); in bfin_write_PLL_CTL()
2720 bfin_write32(SIC_IWR1, iwr1); in bfin_write_PLL_CTL()
2721 bfin_write32(SIC_IWR2, iwr2); in bfin_write_PLL_CTL()
2739 bfin_write32(SIC_IWR0, IWR_ENABLE(0)); in bfin_write_VR_CTL()
2740 bfin_write32(SIC_IWR1, 0); in bfin_write_VR_CTL()
2741 bfin_write32(SIC_IWR2, 0); in bfin_write_VR_CTL()
2747 bfin_write32(SIC_IWR0, iwr0); in bfin_write_VR_CTL()
2748 bfin_write32(SIC_IWR1, iwr1); in bfin_write_VR_CTL()
2749 bfin_write32(SIC_IWR2, iwr2); in bfin_write_VR_CTL()